@@ -89,6 +89,7 @@
#include "i915_vma.h"
#include "intel_gvt.h"
+#include "i915_pvinfo.h"
/* General customization:
*/
@@ -1242,6 +1243,7 @@ struct i915_frontbuffer_tracking {
struct i915_virtual_gpu {
bool active;
u32 caps;
+ u32 pv_caps;
};
/* used in computing the new watermarks state */
@@ -55,6 +55,7 @@ enum vgt_g2v_type {
#define VGT_CAPS_FULL_PPGTT BIT(2)
#define VGT_CAPS_HWSP_EMULATION BIT(3)
#define VGT_CAPS_HUGE_GTT BIT(4)
+#define VGT_CAPS_PV BIT(5)
struct vgt_if {
u64 magic; /* VGT_MAGIC */
@@ -107,7 +108,9 @@ struct vgt_if {
u32 execlist_context_descriptor_lo;
u32 execlist_context_descriptor_hi;
- u32 rsv7[0x200 - 24]; /* pad to one page */
+ u32 pv_caps;
+
+ u32 rsv7[0x200 - 25]; /* pad to one page */
} __packed;
#define vgtif_reg(x) \
@@ -79,7 +79,14 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)
dev_priv->vgpu.caps = __raw_uncore_read32(uncore, vgtif_reg(vgt_caps));
dev_priv->vgpu.active = true;
- DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
+
+ if (!intel_vgpu_check_pv_caps(dev_priv)) {
+ DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
+ return;
+ }
+
+ DRM_INFO("Virtual GPU for Intel GVT-g detected with pv_caps 0x%x.\n",
+ dev_priv->vgpu.pv_caps);
}
bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
@@ -274,3 +281,39 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)
DRM_ERROR("VGT balloon fail\n");
return ret;
}
+
+/*
+ * i915 vgpu PV support for Linux
+ */
+
+/**
+ * intel_vgpu_check_pv_caps - detect virtual GPU PV capabilities
+ * @dev_priv: i915 device private
+ *
+ * This function is called at the initialization stage, to detect VGPU
+ * PV capabilities
+ *
+ * If guest wants to enable pv_caps, it needs to config it explicitly
+ * through vgt_if interface from gvt layer.
+ */
+bool intel_vgpu_check_pv_caps(struct drm_i915_private *dev_priv)
+{
+ struct intel_uncore *uncore = &dev_priv->uncore;
+ u32 gvt_pvcaps;
+ u32 pvcaps;
+
+ if (!intel_vgpu_has_pv_caps(dev_priv))
+ return false;
+
+ /* PV capability negotiation between PV guest and GVT */
+ gvt_pvcaps = __raw_uncore_read32(uncore, vgtif_reg(pv_caps));
+ pvcaps = dev_priv->vgpu.pv_caps & gvt_pvcaps;
+ dev_priv->vgpu.pv_caps = pvcaps;
+
+ if (!pvcaps)
+ return false;
+
+ __raw_uncore_write32(uncore, vgtif_reg(pv_caps), pvcaps);
+
+ return true;
+}
@@ -42,7 +42,15 @@ intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv)
return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
}
+static inline bool
+intel_vgpu_has_pv_caps(struct drm_i915_private *dev_priv)
+{
+ return dev_priv->vgpu.caps & VGT_CAPS_PV;
+}
+
int intel_vgt_balloon(struct drm_i915_private *dev_priv);
void intel_vgt_deballoon(struct drm_i915_private *dev_priv);
+/* i915 vgpu pv related functions */
+bool intel_vgpu_check_pv_caps(struct drm_i915_private *dev_priv);
#endif /* _I915_VGPU_H_ */
pv capability for vgpu was introduced by pv_caps in struct i915_virtual_gpu and a new pv_caps register for host GVT was defined in struct vgt_if for vgpu pv optimization. both of them are used to control different feature pv optimization supported and implemented by both guest and host. These fields are default zero, no any pv feature enabled. it also adds VGT_CAPS_PV capability BIT for guest to check GVTg can support PV feature or not. v0: RFC, introudced enable_pvmmio module parameter. v1: addressed RFC comment to remove enable_pvmmio module parameter by pv capability check. v2: rebase v3: distinct pv caps from guest and host. renamed enable_pvmmio to pvmmio_caps which is used for host pv caps. v4: consolidated all pv related functons into a single file i915_vgpu.c and renamed pvmmio to pv_caps. v5: rebase Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_pvinfo.h | 5 ++++- drivers/gpu/drm/i915/i915_vgpu.c | 45 +++++++++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/i915_vgpu.h | 8 +++++++ 4 files changed, 58 insertions(+), 2 deletions(-)