[14/14] drm/i915: Convert inconsistent static engine tables into an init error
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Message ID 20190501114541.10077-14-chris@chris-wilson.co.uk
State New
Headers show
Series
  • [01/14] drm/i915/hangcheck: Track context changes
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Commit Message

Chris Wilson May 1, 2019, 11:45 a.m. UTC
Remove the modification of the "constant" device info by promoting the
inconsistent intel_engine static table into an initialisation error.
Now, if we add a new engine into the device_info, we must first add that
engine information into the intel_engines.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 28 ++++++++---------------
 1 file changed, 9 insertions(+), 19 deletions(-)

Patch
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diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index f178f1268f4e..0b3da6d2ef59 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -372,15 +372,14 @@  void intel_engines_cleanup(struct drm_i915_private *i915)
  */
 int intel_engines_init_mmio(struct drm_i915_private *i915)
 {
-	struct intel_device_info *device_info = mkwrite_device_info(i915);
-	const unsigned int engine_mask = INTEL_INFO(i915)->engine_mask;
-	unsigned int mask = 0;
 	unsigned int i;
 	int err;
 
-	WARN_ON(engine_mask == 0);
-	WARN_ON(engine_mask &
-		GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
+	/* We always presume we have at least RCS available for later probing */
+	if (GEM_WARN_ON(!HAS_ENGINE(i915, RCS0))) {
+		err = -ENODEV;
+		goto cleanup;
+	}
 
 	if (i915_inject_load_failure())
 		return -ENODEV;
@@ -392,25 +391,16 @@  int intel_engines_init_mmio(struct drm_i915_private *i915)
 		err = intel_engine_setup(i915, i);
 		if (err)
 			goto cleanup;
-
-		mask |= BIT(i);
 	}
 
-	/*
-	 * Catch failures to update intel_engines table when the new engines
-	 * are added to the driver by a warning and disabling the forgotten
-	 * engines.
-	 */
-	if (WARN_ON(mask != engine_mask))
-		device_info->engine_mask = mask;
-
-	/* We always presume we have at least RCS available for later probing */
-	if (WARN_ON(!HAS_ENGINE(i915, RCS0))) {
+	/* Catch failures to update intel_engines table for new engines. */
+	if (GEM_WARN_ON(INTEL_INFO(i915)->engine_mask >> i)) {
 		err = -ENODEV;
 		goto cleanup;
 	}
 
-	RUNTIME_INFO(i915)->num_engines = hweight32(mask);
+	RUNTIME_INFO(i915)->num_engines =
+		hweight32(INTEL_INFO(i915)->engine_mask);
 
 	i915_check_and_clear_faults(i915);