| Message ID | 20190506152627.20283-1-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Kill PCH_KBP | expand |
On Mon, 06 May 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > For us KBP is 100% identical to SPT. Kill the redundant enum > value. Also bspec doesn't talk about KBP either, so this might > avoid some confusion when cross checking the code against the > spec. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 3 ++- > drivers/gpu/drm/i915/i915_drv.h | 4 +--- > drivers/gpu/drm/i915/intel_gmbus.c | 6 ++---- > 3 files changed, 5 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 5ed864752c7b..2c7a4318d13c 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -195,7 +195,8 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) > DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n"); > WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && > !IS_COFFEELAKE(dev_priv)); > - return PCH_KBP; > + /* KBP is SPT compatible */ > + return PCH_SPT; > case INTEL_PCH_CNP_DEVICE_ID_TYPE: > DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); > WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 64fa353a62bb..9321595aaf96 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -532,8 +532,7 @@ enum intel_pch { > PCH_IBX, /* Ibexpeak PCH */ > PCH_CPT, /* Cougarpoint/Pantherpoint PCH */ > PCH_LPT, /* Lynxpoint/Wildcatpoint PCH */ > - PCH_SPT, /* Sunrisepoint PCH */ > - PCH_KBP, /* Kaby Lake PCH */ > + PCH_SPT, /* Sunrisepoint/Kaby Lake PCH */ > PCH_CNP, /* Cannon/Comet Lake PCH */ > PCH_ICP, /* Ice Lake PCH */ > }; > @@ -2629,7 +2628,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id) > #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) > #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP) > -#define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP) > #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT) > #define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT) > #define HAS_PCH_LPT_LP(dev_priv) \ > diff --git a/drivers/gpu/drm/i915/intel_gmbus.c b/drivers/gpu/drm/i915/intel_gmbus.c > index 8c36a06bda3f..969ce8b71e32 100644 > --- a/drivers/gpu/drm/i915/intel_gmbus.c > +++ b/drivers/gpu/drm/i915/intel_gmbus.c > @@ -581,8 +581,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, > /* Display WA #0868: skl,bxt,kbl,cfl,glk,cnl */ > if (IS_GEN9_LP(dev_priv)) > bxt_gmbus_clock_gating(dev_priv, false); > - else if (HAS_PCH_SPT(dev_priv) || > - HAS_PCH_KBP(dev_priv) || HAS_PCH_CNP(dev_priv)) > + else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_CNP(dev_priv)) > pch_gmbus_clock_gating(dev_priv, false); > > retry: > @@ -691,8 +690,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, > /* Display WA #0868: skl,bxt,kbl,cfl,glk,cnl */ > if (IS_GEN9_LP(dev_priv)) > bxt_gmbus_clock_gating(dev_priv, true); > - else if (HAS_PCH_SPT(dev_priv) || > - HAS_PCH_KBP(dev_priv) || HAS_PCH_CNP(dev_priv)) > + else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_CNP(dev_priv)) > pch_gmbus_clock_gating(dev_priv, true); > > return ret;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 5ed864752c7b..2c7a4318d13c 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -195,7 +195,8 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n"); WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); - return PCH_KBP; + /* KBP is SPT compatible */ + return PCH_SPT; case INTEL_PCH_CNP_DEVICE_ID_TYPE: DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 64fa353a62bb..9321595aaf96 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -532,8 +532,7 @@ enum intel_pch { PCH_IBX, /* Ibexpeak PCH */ PCH_CPT, /* Cougarpoint/Pantherpoint PCH */ PCH_LPT, /* Lynxpoint/Wildcatpoint PCH */ - PCH_SPT, /* Sunrisepoint PCH */ - PCH_KBP, /* Kaby Lake PCH */ + PCH_SPT, /* Sunrisepoint/Kaby Lake PCH */ PCH_CNP, /* Cannon/Comet Lake PCH */ PCH_ICP, /* Ice Lake PCH */ }; @@ -2629,7 +2628,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id) #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP) -#define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP) #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT) #define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT) #define HAS_PCH_LPT_LP(dev_priv) \ diff --git a/drivers/gpu/drm/i915/intel_gmbus.c b/drivers/gpu/drm/i915/intel_gmbus.c index 8c36a06bda3f..969ce8b71e32 100644 --- a/drivers/gpu/drm/i915/intel_gmbus.c +++ b/drivers/gpu/drm/i915/intel_gmbus.c @@ -581,8 +581,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, /* Display WA #0868: skl,bxt,kbl,cfl,glk,cnl */ if (IS_GEN9_LP(dev_priv)) bxt_gmbus_clock_gating(dev_priv, false); - else if (HAS_PCH_SPT(dev_priv) || - HAS_PCH_KBP(dev_priv) || HAS_PCH_CNP(dev_priv)) + else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_CNP(dev_priv)) pch_gmbus_clock_gating(dev_priv, false); retry: @@ -691,8 +690,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, /* Display WA #0868: skl,bxt,kbl,cfl,glk,cnl */ if (IS_GEN9_LP(dev_priv)) bxt_gmbus_clock_gating(dev_priv, true); - else if (HAS_PCH_SPT(dev_priv) || - HAS_PCH_KBP(dev_priv) || HAS_PCH_CNP(dev_priv)) + else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_CNP(dev_priv)) pch_gmbus_clock_gating(dev_priv, true); return ret;