| Message ID | 20190513140259.17525-1-festevam@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: imx8mq-zii-ultra: Operate I2C at 100kHz | expand |
Hi Fabio, Am Montag, den 13.05.2019, 11:02 -0300 schrieb Fabio Estevam: > According to the i.MX8M errata document [1], there is an I2C spec > violation when the I2C clock frequency is 400 kHz: > > "e7805: I2C: When the I2C clock speed is configured for 400 kHz, the > SCL low period violates the I2C spec of 1.3 uS min" > Avoid this problem by running I2C at 100 kHz instead. Does this fix a real bug? The same issue is present with the i.MX6 I2C controllers, but we are still running a lot of i2c busses on i.MX6 based boards at 400kHz, with no issues whatsoever. Regards, Lucas > [1] https://www.nxp.com/docs/en/errata/IMX8MDQLQ_1N14W.pdf > > Signed-off-by: Fabio Estevam <festevam@gmail.com> > --- > arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi > b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi > index 7a1706f969f0..8603fb1a78d0 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi > @@ -253,14 +253,14 @@ > }; > > &i2c1 { > - clock-frequency = <400000>; > + clock-frequency = <100000>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_i2c1>; > status = "okay"; > }; > > &i2c2 { > - clock-frequency = <400000>; > + clock-frequency = <100000>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_i2c2>; > status = "okay"; > @@ -376,7 +376,7 @@ > }; > > &i2c4 { > - clock-frequency = <400000>; > + clock-frequency = <100000>; > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_i2c4>; > status = "okay";
Hi Lucas, On Mon, May 13, 2019 at 11:07 AM Lucas Stach <l.stach@pengutronix.de> wrote: > Does this fix a real bug? The same issue is present with the i.MX6 I2C Not really, just trying to be on the safe side. > controllers, but we are still running a lot of i2c busses on i.MX6 > based boards at 400kHz, with no issues whatsoever. Ok, so let's keep it at 400kHz then. Regards, Fabio Estevam
Hi Lucas On 2019-05-13 07:07, Lucas Stach wrote: > Hi Fabio, > > Am Montag, den 13.05.2019, 11:02 -0300 schrieb Fabio Estevam: >> According to the i.MX8M errata document [1], there is an I2C spec >> violation when the I2C clock frequency is 400 kHz: >> >> "e7805: I2C: When the I2C clock speed is configured for 400 kHz, the >> SCL low period violates the I2C spec of 1.3 uS min" > >> Avoid this problem by running I2C at 100 kHz instead. > > Does this fix a real bug? The same issue is present with the i.MX6 I2C > controllers, but we are still running a lot of i2c busses on i.MX6 > based boards at 400kHz, with no issues whatsoever. > We've definitely seen issues running at 400kHz with the librem5 devkit and it's using the i.MX8MQ. Angus > Regards, > Lucas > >> [1] https://www.nxp.com/docs/en/errata/IMX8MDQLQ_1N14W.pdf >> >> Signed-off-by: Fabio Estevam <festevam@gmail.com> >> --- >> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi >> b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi >> index 7a1706f969f0..8603fb1a78d0 100644 >> --- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi >> +++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi >> @@ -253,14 +253,14 @@ >> }; >> >> &i2c1 { >> - clock-frequency = <400000>; >> + clock-frequency = <100000>; >> pinctrl-names = "default"; >> pinctrl-0 = <&pinctrl_i2c1>; >> status = "okay"; >> }; >> >> &i2c2 { >> - clock-frequency = <400000>; >> + clock-frequency = <100000>; >> pinctrl-names = "default"; >> pinctrl-0 = <&pinctrl_i2c2>; >> status = "okay"; >> @@ -376,7 +376,7 @@ >> }; >> >> &i2c4 { >> - clock-frequency = <400000>; >> + clock-frequency = <100000>; >> pinctrl-names = "default"; >> pinctrl-0 = <&pinctrl_i2c4>; >> status = "okay"; > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Am Donnerstag, den 23.05.2019, 06:19 -0700 schrieb Angus Ainslie: > Hi Lucas > > On 2019-05-13 07:07, Lucas Stach wrote: > > Hi Fabio, > > > > Am Montag, den 13.05.2019, 11:02 -0300 schrieb Fabio Estevam: > > > According to the i.MX8M errata document [1], there is an I2C spec > > > violation when the I2C clock frequency is 400 kHz: > > > > > > "e7805: I2C: When the I2C clock speed is configured for 400 kHz, the > > > SCL low period violates the I2C spec of 1.3 uS min" > > > Avoid this problem by running I2C at 100 kHz instead. > > > > Does this fix a real bug? The same issue is present with the i.MX6 I2C > > controllers, but we are still running a lot of i2c busses on i.MX6 > > based boards at 400kHz, with no issues whatsoever. > > > > We've definitely seen issues running at 400kHz with the librem5 devkit > and it's using the i.MX8MQ. I'm not claiming that the erratum will not cause any issues on a random system, as that's obviously dependent on the board design and connected i2c slaves. All I'm claiming is that the i.MX6 has the same erratum and we have no issues with running those busses at 400KHz on the RDU2 board, which is pretty close to the Ultra board that is changed by this specific patch. But then IIRC you don't need to reduce the i2c speed all the way to 100KHz to work around the low time violation. You only need to reduce it slightly to to 375KHz to get in line with the i2c spec. Most of the i2c issue I've seen in the wild have nothing to do with the host controller, but are caused by issues in board design, like weak pull-ups or ground bounces. Regards, Lucas
Regarding this patch and errata, I found the following NXP patch which is against the same errata: https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/i2c?h=imx_4.19.35_1.0.0&id=5d355407812025e5157f82b7763580e7295a40fd Perhaps this is a suitable solution for upstream? On Thu, May 23, 2019 at 8:01 AM Lucas Stach <l.stach@pengutronix.de> wrote: > > Am Donnerstag, den 23.05.2019, 06:19 -0700 schrieb Angus Ainslie: > > Hi Lucas > > > > On 2019-05-13 07:07, Lucas Stach wrote: > > > Hi Fabio, > > > > > > Am Montag, den 13.05.2019, 11:02 -0300 schrieb Fabio Estevam: > > > > According to the i.MX8M errata document [1], there is an I2C spec > > > > violation when the I2C clock frequency is 400 kHz: > > > > > > > > "e7805: I2C: When the I2C clock speed is configured for 400 kHz, the > > > > SCL low period violates the I2C spec of 1.3 uS min" > > > > Avoid this problem by running I2C at 100 kHz instead. > > > > > > Does this fix a real bug? The same issue is present with the i.MX6 I2C > > > controllers, but we are still running a lot of i2c busses on i.MX6 > > > based boards at 400kHz, with no issues whatsoever. > > > > > > > We've definitely seen issues running at 400kHz with the librem5 devkit > > and it's using the i.MX8MQ. > > I'm not claiming that the erratum will not cause any issues on a random > system, as that's obviously dependent on the board design and connected > i2c slaves. All I'm claiming is that the i.MX6 has the same erratum and > we have no issues with running those busses at 400KHz on the RDU2 > board, which is pretty close to the Ultra board that is changed by this > specific patch. > > But then IIRC you don't need to reduce the i2c speed all the way to > 100KHz to work around the low time violation. You only need to reduce > it slightly to to 375KHz to get in line with the i2c spec. > Most of the i2c issue I've seen in the wild have nothing to do with the > host controller, but are caused by issues in board design, like weak > pull-ups or ground bounces. > > Regards, > Lucas
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi index 7a1706f969f0..8603fb1a78d0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi @@ -253,14 +253,14 @@ }; &i2c1 { - clock-frequency = <400000>; + clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; }; &i2c2 { - clock-frequency = <400000>; + clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; @@ -376,7 +376,7 @@ }; &i2c4 { - clock-frequency = <400000>; + clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay";
According to the i.MX8M errata document [1], there is an I2C spec violation when the I2C clock frequency is 400 kHz: "e7805: I2C: When the I2C clock speed is configured for 400 kHz, the SCL low period violates the I2C spec of 1.3 uS min" Avoid this problem by running I2C at 100 kHz instead. [1] https://www.nxp.com/docs/en/errata/IMX8MDQLQ_1N14W.pdf Signed-off-by: Fabio Estevam <festevam@gmail.com> --- arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)