diff mbox series

[v2] svm/avic: Allow avic_vcpu_load logic to support host APIC ID 255

Message ID 1557848977-146396-1-git-send-email-suravee.suthikulpanit@amd.com (mailing list archive)
State New, archived
Headers show
Series [v2] svm/avic: Allow avic_vcpu_load logic to support host APIC ID 255 | expand

Commit Message

Suthikulpanit, Suravee May 14, 2019, 3:49 p.m. UTC
Current logic does not allow VCPU to be loaded onto CPU with
APIC ID 255. This should be allowed since the host physical APIC ID
field in the AVIC Physical APIC table entry is an 8-bit value,
and APIC ID 255 is valid in system with x2APIC enabled.
Instead, do not allow VCPU load if the host APIC ID cannot be
represented by an 8-bit value.

Also, use the more appropriate AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK
instead of AVIC_MAX_PHYSICAL_ID_COUNT. 

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---

Change in V2:
  * Use AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK instead of
    AVIC_MAX_PHYSICAL_ID_COUNT. 

 arch/x86/kvm/svm.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Paolo Bonzini May 20, 2019, 12:57 p.m. UTC | #1
On 14/05/19 17:49, Suthikulpanit, Suravee wrote:
> Current logic does not allow VCPU to be loaded onto CPU with
> APIC ID 255. This should be allowed since the host physical APIC ID
> field in the AVIC Physical APIC table entry is an 8-bit value,
> and APIC ID 255 is valid in system with x2APIC enabled.
> Instead, do not allow VCPU load if the host APIC ID cannot be
> represented by an 8-bit value.
> 
> Also, use the more appropriate AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK
> instead of AVIC_MAX_PHYSICAL_ID_COUNT. 
> 
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

Queued, with Cc to stable and using "kvm: svm/avic: fix off-by-one in
checking host APIC ID" as the subject.

Paolo

> ---
> 
> Change in V2:
>   * Use AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK instead of
>     AVIC_MAX_PHYSICAL_ID_COUNT. 
> 
>  arch/x86/kvm/svm.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 687767f..345fe9e 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -2071,7 +2071,11 @@ static void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
>  	if (!kvm_vcpu_apicv_active(vcpu))
>  		return;
>  
> -	if (WARN_ON(h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT))
> +	/*
> +	 * Since the host physical APIC id is 8 bits,
> +	 * we can support host APIC ID upto 255.
> +	 */
> +	if (WARN_ON(h_physical_id > AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK))
>  		return;
>  
>  	entry = READ_ONCE(*(svm->avic_physical_id_cache));
>
diff mbox series

Patch

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 687767f..345fe9e 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -2071,7 +2071,11 @@  static void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 	if (!kvm_vcpu_apicv_active(vcpu))
 		return;
 
-	if (WARN_ON(h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT))
+	/*
+	 * Since the host physical APIC id is 8 bits,
+	 * we can support host APIC ID upto 255.
+	 */
+	if (WARN_ON(h_physical_id > AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK))
 		return;
 
 	entry = READ_ONCE(*(svm->avic_physical_id_cache));