From patchwork Wed May 15 15:20:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 10944945 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D20B933 for ; Wed, 15 May 2019 15:39:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0D18328306 for ; Wed, 15 May 2019 15:39:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0100328387; Wed, 15 May 2019 15:39:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A463E28306 for ; Wed, 15 May 2019 15:39:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727511AbfEOPjU (ORCPT ); Wed, 15 May 2019 11:39:20 -0400 Received: from pbmsgap02.intersil.com ([192.157.179.202]:51538 "EHLO pbmsgap02.intersil.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727248AbfEOPjU (ORCPT ); Wed, 15 May 2019 11:39:20 -0400 Received: from pps.filterd (pbmsgap02.intersil.com [127.0.0.1]) by pbmsgap02.intersil.com (8.16.0.27/8.16.0.27) with SMTP id x4FFDKb5019725; Wed, 15 May 2019 11:21:22 -0400 Received: from pbmxdp03.intersil.corp (pbmxdp03.pb.intersil.com [132.158.200.224]) by pbmsgap02.intersil.com with ESMTP id 2sdrjcb6gp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 15 May 2019 11:21:22 -0400 Received: from pbmxdp01.intersil.corp (132.158.200.222) by pbmxdp03.intersil.corp (132.158.200.224) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.1531.3; Wed, 15 May 2019 11:21:21 -0400 Received: from localhost.localdomain (132.158.202.108) by pbmxdp01.intersil.corp (132.158.200.222) with Microsoft SMTP Server id 15.1.1531.3 via Frontend Transport; Wed, 15 May 2019 11:21:20 -0400 From: Chris Brandt To: Rob Herring , Mark Rutland , Greg Kroah-Hartman , Simon Horman , Yoshihiro Shimoda CC: Geert Uytterhoeven , Sergei Shtylyov , Chunfeng Yun , Kuninori Morimoto , , , , "Chris Brandt" Subject: [PATCH v4 02/13] dt-bindings: rcar-gen3-phy-usb2: Document use of usb_x1 Date: Wed, 15 May 2019 10:20:37 -0500 Message-ID: <20190515152048.42363-3-chris.brandt@renesas.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20190515152048.42363-1-chris.brandt@renesas.com> References: <20190515152048.42363-1-chris.brandt@renesas.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-05-15_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=junk_notspam policy=junk score=0 suspectscore=2 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=955 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905150094 X-Proofpoint-Spam-Reason: mlx Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the USB_X1 input and add clock-names to identify functional and USB_X1 clocks. Signed-off-by: Chris Brandt Reviewed-by: Rob Herring Reviewed-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Reviewed-by: Simon Horman --- v4: * 'Name' to 'Names' * "fclk" to "fck" * added reviewed-by v3: * added clock names v2: * removed 'use_usb_x1' option * document that 'usb_x1' clock node will be detected to determine if 48MHz clock exists --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt index d46188f450bf..f05d2c39a556 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt @@ -28,7 +28,11 @@ Required properties: followed by the generic version. - reg: offset and length of the partial USB 2.0 Host register block. -- clocks: clock phandle and specifier pair(s). +- clocks: clock phandle and specifier pair(s). For SoCs that have a separate + dedicated USB_X1 input for the PLL, that is also listed. +- clock-names: Names of the clocks. The functional clock shall be called "fck" + and USB_X1 shall be called "usb_x1". If only one clock is listed, + this property is not required. - #phy-cells: see phy-bindings.txt in the same directory, must be <1> (and using <0> is deprecated).