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bh=7Z3x6LljX02dT+qUsi4m5KdJMqoZuShmgkReRd7s7dw=; b=Z4qpZoeV+N5fXSjsDrca9kmWGFcMBRORS4po+h4l2Jc8NyW3jd2B9XP0FXV+AsJ8fq 3xL3wfojIYMuGqcLaVpfVA3sQphXSIiXRCp+eMbX+TbT8dxYCzTILLpQfUIigbc5f/JV /r6J8NzSlS36Nu0ZXOSr62s7Szj/M8oXcepzLkpLVSS5gXV2lDgvDvFAOgaC2jtSsO27 jad6NUmf5p1fsvN6XYo5jeXCD77O8bdWY3/+eHk3QDWpU/e2cShVSLiuLLKtGTcQaW+E oJBJrirBBsQUSinRRxpgsD0xcVa3bLMV/Uw2TXu7loxk3pFFlOAwxWN8DOo2wYwKJYrQ 7Jbw== X-Gm-Message-State: APjAAAVUb0dnsFGhtlqHJ6IOfO8XAoWDBRSFvQRDoKsBXCGaWpBtAixU yPIt2d3rvI+CzGmLBdxul8Hcmw== X-Google-Smtp-Source: APXvYqzLgYLTjFtQLw4oKcVl1iHzhftrgdySuDkHfC1rKahZhdIXQSYYBQYO4ZaxRqZhqAfjXafQQA== X-Received: by 2002:a62:62c1:: with SMTP id w184mr77662542pfb.95.1558343254514; Mon, 20 May 2019 02:07:34 -0700 (PDT) Received: from localhost.localdomain ([183.82.227.193]) by smtp.gmail.com with ESMTPSA id d15sm51671614pfm.186.2019.05.20.02.07.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 May 2019 02:07:34 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes Date: Mon, 20 May 2019 14:33:11 +0530 Message-Id: <20190520090318.27570-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190520090318.27570-1-jagan@amarulasolutions.com> References: <20190520090318.27570-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190520_020735_499594_426C1E8D X-CRM114-Status: GOOD ( 14.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bshah@mykolab.com, powerpan@qq.com, linux-sunxi@googlegroups.com, Jagan Teki , michael@amarulasolutions.com, linux-amarula@amarulasolutions.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical MIPI clock topology in Allwinner DSI controller. TCON dotclock driver is computing the desired DCLK divider based on panel pixel clock along with input DCLK min, max divider values from tcon driver and that would eventually set the pll-mipi clock rate. The current code is passing dsi min and max divider value as 4 via tcon driver which would ended-up triggering below vblank wait timed out warning on "bananapi,s070wv20-ct16" panel. WARNING: CPU: 0 PID: 31 at drivers/gpu/drm/drm_atomic_helper.c:1429 drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0 [CRTC:46:crtc-0] vblank wait timed out Modules linked in: CPU: 0 PID: 31 Comm: kworker/0:1 Not tainted 5.1.0-next-20190514-00025-g5186cdf10757-dirty #6 Hardware name: Allwinner sun8i Family Workqueue: events deferred_probe_work_func [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x84/0x98) [] (dump_stack) from [] (__warn+0xfc/0x114) [] (__warn) from [] (warn_slowpath_fmt+0x44/0x68) [] (warn_slowpath_fmt) from [] (drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0) [] (drm_atomic_helper_wait_for_vblanks.part.1) from [] (drm_atomic_helper_commit_tail_rpm+0x5c/0x6c) [] (drm_atomic_helper_commit_tail_rpm) from [] (commit_tail+0x40/0x6c) [] (commit_tail) from [] (drm_atomic_helper_commit+0xbc/0x128) [] (drm_atomic_helper_commit) from [] (restore_fbdev_mode_atomic+0x1cc/0x1dc) [] (restore_fbdev_mode_atomic) from [] (drm_fb_helper_restore_fbdev_mode_unlocked+0x54/0xa0) [] (drm_fb_helper_restore_fbdev_mode_unlocked) from [] (drm_fb_helper_set_par+0x30/0x54) [] (drm_fb_helper_set_par) from [] (fbcon_init+0x560/0x5ac) [] (fbcon_init) from [] (visual_init+0xbc/0x104) [] (visual_init) from [] (do_bind_con_driver+0x1b0/0x390) [] (do_bind_con_driver) from [] (do_take_over_console+0x13c/0x1c4) [] (do_take_over_console) from [] (do_fbcon_takeover+0x74/0xcc) [] (do_fbcon_takeover) from [] (notifier_call_chain+0x44/0x84) [] (notifier_call_chain) from [] (__blocking_notifier_call_chain+0x48/0x60) [] (__blocking_notifier_call_chain) from [] (blocking_notifier_call_chain+0x18/0x20) [] (blocking_notifier_call_chain) from [] (register_framebuffer+0x1e0/0x2f8) [] (register_framebuffer) from [] (__drm_fb_helper_initial_config_and_unlock+0x2fc/0x50c) [] (__drm_fb_helper_initial_config_and_unlock) from [] (drm_fbdev_client_hotplug+0xe8/0x1b8) [] (drm_fbdev_client_hotplug) from [] (drm_fbdev_generic_setup+0x88/0x118) [] (drm_fbdev_generic_setup) from [] (sun4i_drv_bind+0x128/0x160) [] (sun4i_drv_bind) from [] (try_to_bring_up_master+0x164/0x1a0) [] (try_to_bring_up_master) from [] (__component_add+0x94/0x140) [] (__component_add) from [] (sun6i_dsi_probe+0x144/0x234) [] (sun6i_dsi_probe) from [] (platform_drv_probe+0x48/0x9c) [] (platform_drv_probe) from [] (really_probe+0x1dc/0x2c8) [] (really_probe) from [] (driver_probe_device+0x60/0x160) [] (driver_probe_device) from [] (bus_for_each_drv+0x74/0xb8) [] (bus_for_each_drv) from [] (__device_attach+0xd0/0x13c) [] (__device_attach) from [] (bus_probe_device+0x84/0x8c) [] (bus_probe_device) from [] (deferred_probe_work_func+0x64/0x90) [] (deferred_probe_work_func) from [] (process_one_work+0x204/0x420) [] (process_one_work) from [] (worker_thread+0x274/0x5a0) [] (worker_thread) from [] (kthread+0x11c/0x14c) [] (kthread) from [] (ret_from_fork+0x14/0x2c) Exception stack(0xde539fb0 to 0xde539ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ---[ end trace 4017fea4906ab391 ]--- But accordingly to Allwinner A33, A64 BSP codes [1] [2] this divider is clearly using 'format/lanes' for dsi divider value, dsi_clk.clk_div Which would compute the pll_freq and set a clock rate for it in [3] and [4] respectively. The same issue has reproduced in A33, A64 with 4-lane and 2-lane devices and got fixed with this computation logic 'format/lanes', so this patch using dclk min and max dividers as per BSP. [1] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1106 [2] https://github.com/BPI-SINOVOIP/BPI-M64-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/disp_al.c#L213 [3] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1127 [4] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1161 Tested-by: Merlijn Wajer Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 9d8d8124b1f6..8f93121fead4 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -341,8 +341,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, u32 block_space, start_delay; u32 tcon_div; - tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; - tcon->dclk_max_div = SUN6I_DSI_TCON_DIV; + tcon->dclk_min_div = bpp/lanes; + tcon->dclk_max_div = bpp/lanes; sun4i_tcon0_mode_set_common(tcon, mode);