| Message ID | 20190520135354.18628-2-elder@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | net: introduce "include/linux/if_rmnet.h" | expand |
On Mon 20 May 06:53 PDT 2019, Alex Elder wrote: > The C bit-fields in the first byte of the rmnet_map_header structure > are defined in the wrong order. The first byte should be formatted > this way: > +------- reserved_bit > | +----- cd_bit > | | > v v > +-----------+-+-+ > | pad_len |R|C| > +-----------+-+-+ > 7 6 5 4 3 2 1 0 <-- bit position > > But the C bit-fields that define the first byte are defined this way: > u8 pad_len:6; > u8 reserved_bit:1; > u8 cd_bit:1; > > And although this isn't portable, I can state that when I build it > the result puts the bit-fields in the wrong location (e.g., the > cd_bit is in bit position 7, when it should be position 0). > > Fix this by reordering the definitions of these struct members. > Upcoming patches will reimplement these definitions portably. > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > Signed-off-by: Alex Elder <elder@linaro.org> > --- > drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > index 884f1f52dcc2..b1ae9499c0b2 100644 > --- a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > +++ b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > @@ -40,9 +40,9 @@ enum rmnet_map_commands { > }; > > struct rmnet_map_header { > - u8 pad_len:6; > - u8 reserved_bit:1; > u8 cd_bit:1; > + u8 reserved_bit:1; > + u8 pad_len:6; > u8 mux_id; > __be16 pkt_len; > } __aligned(1); > -- > 2.20.1 >
On 2019-05-20 07:53, Alex Elder wrote: > The C bit-fields in the first byte of the rmnet_map_header structure > are defined in the wrong order. The first byte should be formatted > this way: > +------- reserved_bit > | +----- cd_bit > | | > v v > +-----------+-+-+ > | pad_len |R|C| > +-----------+-+-+ > 7 6 5 4 3 2 1 0 <-- bit position > > But the C bit-fields that define the first byte are defined this way: > u8 pad_len:6; > u8 reserved_bit:1; > u8 cd_bit:1; > If the above illustration is supposed to be in network byte order, then it is wrong. The documentation has the definition for the MAP packet. Packet format - Bit 0 1 2-7 8 - 15 16 - 31 Function Command / Data Reserved Pad Multiplexer ID Payload length Bit 32 - x Function Raw Bytes The driver was written assuming that the host was running ARM64, so the structs are little endian. (I should have made it compatible with big and little endian earlier so that is my fault). In any case, this patch on its own will break the data operation on ARM64, so it needs to be folded with other patches. > And although this isn't portable, I can state that when I build it > the result puts the bit-fields in the wrong location (e.g., the > cd_bit is in bit position 7, when it should be position 0). > > Fix this by reordering the definitions of these struct members. > Upcoming patches will reimplement these definitions portably. > > Signed-off-by: Alex Elder <elder@linaro.org> > --- > drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > index 884f1f52dcc2..b1ae9499c0b2 100644 > --- a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > +++ b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h > @@ -40,9 +40,9 @@ enum rmnet_map_commands { > }; > > struct rmnet_map_header { > - u8 pad_len:6; > - u8 reserved_bit:1; > u8 cd_bit:1; > + u8 reserved_bit:1; > + u8 pad_len:6; > u8 mux_id; > __be16 pkt_len; > } __aligned(1);
On 5/20/19 3:11 PM, Subash Abhinov Kasiviswanathan wrote: > On 2019-05-20 07:53, Alex Elder wrote: >> The C bit-fields in the first byte of the rmnet_map_header structure >> are defined in the wrong order. The first byte should be formatted >> this way: >> +------- reserved_bit >> | +----- cd_bit >> | | >> v v >> +-----------+-+-+ >> | pad_len |R|C| >> +-----------+-+-+ >> 7 6 5 4 3 2 1 0 <-- bit position >> >> But the C bit-fields that define the first byte are defined this way: >> u8 pad_len:6; >> u8 reserved_bit:1; >> u8 cd_bit:1; >> > > If the above illustration is supposed to be in network byte order, > then it is wrong. The documentation has the definition for the MAP > packet. Network *bit* order is irrelevant to the host. Host memory is byte addressable only, and bit 0 is the low-order bit. > Packet format - > > Bit 0 1 2-7 8 - 15 16 - 31 > Function Command / Data Reserved Pad Multiplexer ID Payload length > Bit 32 - x > Function Raw Bytes I don't know how to interpret this. Are you saying that the low- order bit of the first byte is the command/data flag? Or is it the high-order bit of the first byte? I'm saying that what I observed when building the code was that as originally defined, the cd_bit field was the high-order bit (bit 7) of the first byte, which I understand to be wrong. If you are telling me that the command/data flag resides at bit 7 of the first byte, I will update the field masks in a later patch in this series to reflect that. > The driver was written assuming that the host was running ARM64, so > the structs are little endian. (I should have made it compatible > with big and little endian earlier so that is my fault). Little endian and big endian have no bearing on the host's interpretation of bits within a byte. Please clarify. I want the patches to be correct, and what you're explaining doesn't really straighten things out for me. -Alex > In any case, this patch on its own will break the data operation on > ARM64, so it needs to be folded with other patches. > >> And although this isn't portable, I can state that when I build it >> the result puts the bit-fields in the wrong location (e.g., the >> cd_bit is in bit position 7, when it should be position 0). >> >> Fix this by reordering the definitions of these struct members. >> Upcoming patches will reimplement these definitions portably. >> >> Signed-off-by: Alex Elder <elder@linaro.org> >> --- >> drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h >> b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h >> index 884f1f52dcc2..b1ae9499c0b2 100644 >> --- a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h >> +++ b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h >> @@ -40,9 +40,9 @@ enum rmnet_map_commands { >> }; >> >> struct rmnet_map_header { >> - u8 pad_len:6; >> - u8 reserved_bit:1; >> u8 cd_bit:1; >> + u8 reserved_bit:1; >> + u8 pad_len:6; >> u8 mux_id; >> __be16 pkt_len; >> } __aligned(1); >
>> If the above illustration is supposed to be in network byte order, >> then it is wrong. The documentation has the definition for the MAP >> packet. > > Network *bit* order is irrelevant to the host. Host memory is > byte addressable only, and bit 0 is the low-order bit. > >> Packet format - >> >> Bit 0 1 2-7 8 - 15 16 >> - 31 >> Function Command / Data Reserved Pad Multiplexer ID >> Payload length >> Bit 32 - x >> Function Raw Bytes > > I don't know how to interpret this. Are you saying that the low- > order bit of the first byte is the command/data flag? Or is it > the high-order bit of the first byte? > > I'm saying that what I observed when building the code was that > as originally defined, the cd_bit field was the high-order bit > (bit 7) of the first byte, which I understand to be wrong. > > If you are telling me that the command/data flag resides at bit > 7 of the first byte, I will update the field masks in a later > patch in this series to reflect that. > Higher order bit is Command / Data. >> The driver was written assuming that the host was running ARM64, so >> the structs are little endian. (I should have made it compatible >> with big and little endian earlier so that is my fault). > > Little endian and big endian have no bearing on the host's > interpretation of bits within a byte. > > Please clarify. I want the patches to be correct, and what > you're explaining doesn't really straighten things out for me. > > -Alex Can't this bitfields just be used similar to how struct tcphdr & iphdr are currently defined. That way, you dont have to make these many changes. diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h index 884f1f5..302d1db 100644 --- a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h +++ b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h @@ -40,9 +40,17 @@ enum rmnet_map_commands { }; struct rmnet_map_header { +#if defined(__LITTLE_ENDIAN_BITFIELD) u8 pad_len:6; u8 reserved_bit:1; u8 cd_bit:1; +#elif defined (__BIG_ENDIAN_BITFIELD) + u8 cd_bit:1; + u8 reserved_bit:1; + u8 pad_len:6; +#else +#error "Please fix <asm/byteorder.h>" +#endif u8 mux_id; __be16 pkt_len; } __aligned(1);
On 5/20/19 8:32 PM, Subash Abhinov Kasiviswanathan wrote: >> >> If you are telling me that the command/data flag resides at bit >> 7 of the first byte, I will update the field masks in a later >> patch in this series to reflect that. >> > > Higher order bit is Command / Data. So what this means is that to get the command/data bit we use: first_byte & 0x80 If that is correct I will remove this patch from the series and will update the subsequent patches so bit 7 is the command bit, bit 6 is reserved, and bits 0-5 are the pad length. I will post a v2 of the series with these changes, and will incorporate Bjorn's "Reviewed-by". -Alex
On Mon 20 May 19:30 PDT 2019, Alex Elder wrote: > On 5/20/19 8:32 PM, Subash Abhinov Kasiviswanathan wrote: > >> > >> If you are telling me that the command/data flag resides at bit > >> 7 of the first byte, I will update the field masks in a later > >> patch in this series to reflect that. > >> > > > > Higher order bit is Command / Data. > > So what this means is that to get the command/data bit we use: > > first_byte & 0x80 > > If that is correct I will remove this patch from the series and > will update the subsequent patches so bit 7 is the command bit, > bit 6 is reserved, and bits 0-5 are the pad length. > > I will post a v2 of the series with these changes, and will > incorporate Bjorn's "Reviewed-by". > But didn't you say that your testing show that the current bit order is wrong? I still like the cleanup, if nothing else just to clarify and clearly document the actual content of this header. Regards, Bjorn
On 5/20/19 10:07 PM, Bjorn Andersson wrote: > On Mon 20 May 19:30 PDT 2019, Alex Elder wrote: > >> On 5/20/19 8:32 PM, Subash Abhinov Kasiviswanathan wrote: >>>> >>>> If you are telling me that the command/data flag resides at bit >>>> 7 of the first byte, I will update the field masks in a later >>>> patch in this series to reflect that. >>>> >>> >>> Higher order bit is Command / Data. >> >> So what this means is that to get the command/data bit we use: >> >> first_byte & 0x80 >> >> If that is correct I will remove this patch from the series and >> will update the subsequent patches so bit 7 is the command bit, >> bit 6 is reserved, and bits 0-5 are the pad length. >> >> I will post a v2 of the series with these changes, and will >> incorporate Bjorn's "Reviewed-by". >> > > But didn't you say that your testing show that the current bit order is > wrong? I did say that, but it seems I may have been misinterpreting what the documentation said, namely that "bit 0" in the network data stream is actually the high-order bit in the first byte. I did definitely see that bit 7 (0x80) in the first byte was the one selected by the "cd_bit" C bit-field originally, and I believed that was wrong. The other thing I can say is that I never see that bit set in my use of the rmnet driver for IPA. On top of that, the pad_len value is 0. Given that, either bit order works, because the whole first byte is 0 either way. So it turns out the testing I am able to do is not adequate to verify the change. I am hoping that Subash has an environment in which QMAP commands (with the appropriate bit set) are actually used. I'm going to wait a bit for him to confirm that, but at this time my plan is to do as I said above--remove this patch and adjust the ones that follow accordingly. -Alex > I still like the cleanup, if nothing else just to clarify and clearly > document the actual content of this header. > > Regards, > Bjorn >
diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h index 884f1f52dcc2..b1ae9499c0b2 100644 --- a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h +++ b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h @@ -40,9 +40,9 @@ enum rmnet_map_commands { }; struct rmnet_map_header { - u8 pad_len:6; - u8 reserved_bit:1; u8 cd_bit:1; + u8 reserved_bit:1; + u8 pad_len:6; u8 mux_id; __be16 pkt_len; } __aligned(1);
The C bit-fields in the first byte of the rmnet_map_header structure are defined in the wrong order. The first byte should be formatted this way: +------- reserved_bit | +----- cd_bit | | v v +-----------+-+-+ | pad_len |R|C| +-----------+-+-+ 7 6 5 4 3 2 1 0 <-- bit position But the C bit-fields that define the first byte are defined this way: u8 pad_len:6; u8 reserved_bit:1; u8 cd_bit:1; And although this isn't portable, I can state that when I build it the result puts the bit-fields in the wrong location (e.g., the cd_bit is in bit position 7, when it should be position 0). Fix this by reordering the definitions of these struct members. Upcoming patches will reimplement these definitions portably. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)