[v7,03/12] x86: Add macro to get symbol address for PIE support
diff mbox series

Message ID 20190520231948.49693-4-thgarnie@chromium.org
State New
Headers show
Series
  • x86: PIE support to extend KASLR randomization
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Commit Message

Thomas Garnier May 20, 2019, 11:19 p.m. UTC
From: Thomas Garnier <thgarnie@google.com>

Add a new _ASM_MOVABS macro to fetch a symbol address. It will be used
to replace "_ASM_MOV $<symbol>, %dst" code construct that are not
compatible with PIE.

Signed-off-by: Thomas Garnier <thgarnie@google.com>
---
 arch/x86/include/asm/asm.h | 1 +
 1 file changed, 1 insertion(+)

Comments

H. Peter Anvin May 21, 2019, 3:12 a.m. UTC | #1
On May 20, 2019 4:19:28 PM PDT, Thomas Garnier <thgarnie@chromium.org> wrote:
>From: Thomas Garnier <thgarnie@google.com>
>
>Add a new _ASM_MOVABS macro to fetch a symbol address. It will be used
>to replace "_ASM_MOV $<symbol>, %dst" code construct that are not
>compatible with PIE.
>
>Signed-off-by: Thomas Garnier <thgarnie@google.com>
>---
> arch/x86/include/asm/asm.h | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h
>index 3ff577c0b102..3a686057e882 100644
>--- a/arch/x86/include/asm/asm.h
>+++ b/arch/x86/include/asm/asm.h
>@@ -30,6 +30,7 @@
> #define _ASM_ALIGN	__ASM_SEL(.balign 4, .balign 8)
> 
> #define _ASM_MOV	__ASM_SIZE(mov)
>+#define _ASM_MOVABS	__ASM_SEL(movl, movabsq)
> #define _ASM_INC	__ASM_SIZE(inc)
> #define _ASM_DEC	__ASM_SIZE(dec)
> #define _ASM_ADD	__ASM_SIZE(add)

This is just about *always* wrong on x86-86. We should be using leaq sym(%rip),%reg. If it isn't reachable by leaq, then it is a non-PIE symbol like percpu. You do have to keep those distinct!
Thomas Garnier May 22, 2019, 3:57 p.m. UTC | #2
On Mon, May 20, 2019 at 8:13 PM <hpa@zytor.com> wrote:
>
> On May 20, 2019 4:19:28 PM PDT, Thomas Garnier <thgarnie@chromium.org> wrote:
> >From: Thomas Garnier <thgarnie@google.com>
> >
> >Add a new _ASM_MOVABS macro to fetch a symbol address. It will be used
> >to replace "_ASM_MOV $<symbol>, %dst" code construct that are not
> >compatible with PIE.
> >
> >Signed-off-by: Thomas Garnier <thgarnie@google.com>
> >---
> > arch/x86/include/asm/asm.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> >diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h
> >index 3ff577c0b102..3a686057e882 100644
> >--- a/arch/x86/include/asm/asm.h
> >+++ b/arch/x86/include/asm/asm.h
> >@@ -30,6 +30,7 @@
> > #define _ASM_ALIGN    __ASM_SEL(.balign 4, .balign 8)
> >
> > #define _ASM_MOV      __ASM_SIZE(mov)
> >+#define _ASM_MOVABS   __ASM_SEL(movl, movabsq)
> > #define _ASM_INC      __ASM_SIZE(inc)
> > #define _ASM_DEC      __ASM_SIZE(dec)
> > #define _ASM_ADD      __ASM_SIZE(add)
>
> This is just about *always* wrong on x86-86. We should be using leaq sym(%rip),%reg. If it isn't reachable by leaq, then it is a non-PIE symbol like percpu. You do have to keep those distinct!

Yes, I agree. This patch is just having a shortcut when it is a
non-PIE symbol. The other patches try to separate the use cases where
a leaq sym(%rip) would work versus the need for a movabsq. There are
multiple cases where relative references are not possible because the
memory layout is different (hibernation, early boot or others).

> --
> Sent from my Android device with K-9 Mail. Please excuse my brevity.

Patch
diff mbox series

diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h
index 3ff577c0b102..3a686057e882 100644
--- a/arch/x86/include/asm/asm.h
+++ b/arch/x86/include/asm/asm.h
@@ -30,6 +30,7 @@ 
 #define _ASM_ALIGN	__ASM_SEL(.balign 4, .balign 8)
 
 #define _ASM_MOV	__ASM_SIZE(mov)
+#define _ASM_MOVABS	__ASM_SEL(movl, movabsq)
 #define _ASM_INC	__ASM_SIZE(inc)
 #define _ASM_DEC	__ASM_SIZE(dec)
 #define _ASM_ADD	__ASM_SIZE(add)