[v2,1/3] dt-bindings: soc: Add MT8183 emi dt-bindings
diff mbox series

Message ID 1558670066-22484-2-git-send-email-xixi.chen@mediatek.com
State New
Headers show
Series
  • 8183 emi driver support
Related show

Commit Message

Xi Chen May 24, 2019, 3:54 a.m. UTC
Add emi dt-bindings of MT8183 in binding document.

Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
---
 .../bindings/memory-controllers/mediatek,emi.txt      | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt

Comments

Matthias Brugger June 18, 2019, 9:23 p.m. UTC | #1
On 24/05/2019 05:54, Xi Chen wrote:
> Add emi dt-bindings of MT8183 in binding document.
> 
> Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
> ---
>  .../bindings/memory-controllers/mediatek,emi.txt      | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> new file mode 100644
> index 0000000..a19e3b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> @@ -0,0 +1,19 @@
> +EMI (External Memory Interface)
> +

Please describe a bit more what the EMI interface does.

> +Required properties:
> +- compatible : must be one of :
> +	"mediatek,mt8183-emi"
> +- reg : the register and size of the EMI block.
> +- interrupts : includes MPU, CGM, ELM.
> +
> +Example:
> +	emi@10219000 {
> +	compatible = "mediatek,mt8183-emi";
> +	reg = <0 0x10219000 0 0x1000>, /* CEN EMI */
> +		  <0 0x10226000 0 0x1000>, /* EMI MPU */
> +		  <0 0x1022d000 0 0x1000>, /* CHA EMI */
> +		  <0 0x10235000 0 0x1000>; /* CHB EMI */
> +	interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>, /* MPU */
> +			 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, /* CGM */
> +			 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; /* ELM */
> +};
>
Matthias Brugger June 18, 2019, 9:32 p.m. UTC | #2
On 24/05/2019 05:54, Xi Chen wrote:
> Add emi dt-bindings of MT8183 in binding document.
> 
> Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
> ---
>  .../bindings/memory-controllers/mediatek,emi.txt      | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> new file mode 100644
> index 0000000..a19e3b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> @@ -0,0 +1,19 @@
> +EMI (External Memory Interface)
> +
> +Required properties:
> +- compatible : must be one of :
> +	"mediatek,mt8183-emi"
> +- reg : the register and size of the EMI block.

Please name the registers explicitly.

> +- interrupts : includes MPU, CGM, ELM.
> +
> +Example:
> +	emi@10219000 {
> +	compatible = "mediatek,mt8183-emi";

Please do the indention right.

> +	reg = <0 0x10219000 0 0x1000>, /* CEN EMI */
> +		  <0 0x10226000 0 0x1000>, /* EMI MPU */
> +		  <0 0x1022d000 0 0x1000>, /* CHA EMI */
> +		  <0 0x10235000 0 0x1000>; /* CHB EMI */

This looks quite spread out over the IO space. Is this really one HW block or
did you add various blocks into one driver?

> +	interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>, /* MPU */
> +			 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, /* CGM */
> +			 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; /* ELM */
> +};
>
Xi Chen July 11, 2019, 6:37 a.m. UTC | #3
On Tue, 2019-06-18 at 23:32 +0200, Matthias Brugger wrote:
> 
> On 24/05/2019 05:54, Xi Chen wrote:
> > Add emi dt-bindings of MT8183 in binding document.
> > 
> > Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
> > ---
> >  .../bindings/memory-controllers/mediatek,emi.txt      | 19 +++++++++++++++++++
> >  1 file changed, 19 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> > new file mode 100644
> > index 0000000..a19e3b3
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
> > @@ -0,0 +1,19 @@
> > +EMI (External Memory Interface)
> > +
> > +Required properties:
> > +- compatible : must be one of :
> > +	"mediatek,mt8183-emi"
> > +- reg : the register and size of the EMI block.
> 
> Please name the registers explicitly.
	the "reg" is emi reg base.
> 
> > +- interrupts : includes MPU, CGM, ELM.
> > +
> > +Example:
> > +	emi@10219000 {
> > +	compatible = "mediatek,mt8183-emi";
> 
> Please do the indention right.
	Yes, I do the indention right.
> 
> > +	reg = <0 0x10219000 0 0x1000>, /* CEN EMI */
> > +		  <0 0x10226000 0 0x1000>, /* EMI MPU */
> > +		  <0 0x1022d000 0 0x1000>, /* CHA EMI */
> > +		  <0 0x10235000 0 0x1000>; /* CHB EMI */
> 
> This looks quite spread out over the IO space. Is this really one HW block or
> did you add various blocks into one driver?
	Yes, you are right. I removed the unused reg addr and interrupts.
> 
> > +	interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>, /* MPU */
> > +			 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, /* CGM */
> > +			 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; /* ELM */
> > +};
> >

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
new file mode 100644
index 0000000..a19e3b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,emi.txt
@@ -0,0 +1,19 @@ 
+EMI (External Memory Interface)
+
+Required properties:
+- compatible : must be one of :
+	"mediatek,mt8183-emi"
+- reg : the register and size of the EMI block.
+- interrupts : includes MPU, CGM, ELM.
+
+Example:
+	emi@10219000 {
+	compatible = "mediatek,mt8183-emi";
+	reg = <0 0x10219000 0 0x1000>, /* CEN EMI */
+		  <0 0x10226000 0 0x1000>, /* EMI MPU */
+		  <0 0x1022d000 0 0x1000>, /* CHA EMI */
+		  <0 0x10235000 0 0x1000>; /* CHB EMI */
+	interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>, /* MPU */
+			 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, /* CGM */
+			 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; /* ELM */
+};