diff mbox series

cpufreq: imx-cpufreq-dt: Fix no OPPs available on unfused parts

Message ID 64c450d4ee5119ef21ae744a3ca90d7172f973fd.1559130569.git.leonard.crestez@nxp.com (mailing list archive)
State Accepted
Delegated to: viresh kumar
Headers show
Series cpufreq: imx-cpufreq-dt: Fix no OPPs available on unfused parts | expand

Commit Message

Leonard Crestez May 29, 2019, 11:52 a.m. UTC
Early samples without fuses written report "0 0" which means consumer
segment and minumum speed grading. According to datasheet the minimum speed
grade is not supported for consumer parts so all OPPs are disabled
which results in stack dumps later on.

Fix by clamping minimum consumer speed grade to 1 on imx8mm and imx8mq.

Fixes: 4d28ba1d62c4 ("cpufreq: Add imx-cpufreq-dt driver")

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
 drivers/cpufreq/imx-cpufreq-dt.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Viresh Kumar June 3, 2019, 5:42 a.m. UTC | #1
On 29-05-19, 11:52, Leonard Crestez wrote:
> Early samples without fuses written report "0 0" which means consumer
> segment and minumum speed grading. According to datasheet the minimum speed
> grade is not supported for consumer parts so all OPPs are disabled
> which results in stack dumps later on.
> 
> Fix by clamping minimum consumer speed grade to 1 on imx8mm and imx8mq.
> 
> Fixes: 4d28ba1d62c4 ("cpufreq: Add imx-cpufreq-dt driver")
> 
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> ---
>  drivers/cpufreq/imx-cpufreq-dt.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)

Applied with following changes:

s/minumum/minimum/

Thanks.
diff mbox series

Patch

diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
index 27b9b94cd4fc..ce26ffc18ce6 100644
--- a/drivers/cpufreq/imx-cpufreq-dt.c
+++ b/drivers/cpufreq/imx-cpufreq-dt.c
@@ -49,10 +49,25 @@  static int imx_cpufreq_dt_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
 	speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK) >> OCOTP_CFG3_SPEED_GRADE_SHIFT;
 	mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
+
+	/*
+	 * Early samples without fuses written report "0 0" which means
+	 * consumer segment and minumum speed grading.
+	 *
+	 * According to datasheet minimum speed grading is not supported for
+	 * consumer parts so clamp to 1 to avoid warning for "no OPPs"
+	 *
+	 * Applies to 8mq and 8mm.
+	 */
+	if (mkt_segment == 0 && speed_grade == 0 && (
+			!strcmp(match->compatible, "fsl,imx8mm") ||
+			!strcmp(match->compatible, "fsl,imx8mq")))
+		speed_grade = 1;
+
 	supported_hw[0] = BIT(speed_grade);
 	supported_hw[1] = BIT(mkt_segment);
 	dev_info(&pdev->dev, "cpu speed grade %d mkt segment %d supported-hw %#x %#x\n",
 			speed_grade, mkt_segment, supported_hw[0], supported_hw[1]);