[v2,1/2] a5xx: Define HLSQ_DBG_ECO_CNTL
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Message ID 20190529152022.42799-2-jeffrey.l.hugo@gmail.com
State New
Headers show
Series
  • Adreno A540 support
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Commit Message

Jeffrey Hugo May 29, 2019, 3:20 p.m. UTC
---
 rnndb/adreno/a5xx.xml | 1 +
 1 file changed, 1 insertion(+)

Patch
diff mbox series

diff --git a/rnndb/adreno/a5xx.xml b/rnndb/adreno/a5xx.xml
index ae654eeb..16203512 100644
--- a/rnndb/adreno/a5xx.xml
+++ b/rnndb/adreno/a5xx.xml
@@ -1523,6 +1523,7 @@  xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 
 	<reg32 offset="0x0e00" name="HLSQ_TIMEOUT_THRESHOLD_0"/>
 	<reg32 offset="0x0e01" name="HLSQ_TIMEOUT_THRESHOLD_1"/>
+	<reg32 offset="0x0e04" name="HLSQ_DBG_ECO_CNTL"/>
 	<reg32 offset="0x0e05" name="HLSQ_ADDR_MODE_CNTL"/>
 	<reg32 offset="0x0e06" name="HLSQ_MODE_CNTL"/> <!-- always 00000001? -->
 	<reg32 offset="0x0e10" name="HLSQ_PERFCTR_HLSQ_SEL_0" type="a5xx_hlsq_perfcounter_select"/>