diff mbox series

[1/2] ARM: dts: qcom: msm8974-hammerhead: add touchscreen support

Message ID 20190603010455.17060-1-masneyb@onstation.org (mailing list archive)
State New, archived
Headers show
Series [1/2] ARM: dts: qcom: msm8974-hammerhead: add touchscreen support | expand

Commit Message

Brian Masney June 3, 2019, 1:04 a.m. UTC
From: Jonathan Marek <jonathan@marek.ca>

Add support for the Synaptics RMI4 touchscreen that is found on the
Nexus 5.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
This is to be applied on top of the display patch series:
https://lore.kernel.org/lkml/20190531094619.31704-1-masneyb@onstation.org/

 .../qcom-msm8974-lge-nexus5-hammerhead.dts    | 64 +++++++++++++++++++
 1 file changed, 64 insertions(+)

Comments

Linus Walleij June 7, 2019, 9:10 p.m. UTC | #1
On Mon, Jun 3, 2019 at 3:05 AM Brian Masney <masneyb@onstation.org> wrote:

> From: Jonathan Marek <jonathan@marek.ca>
>
> Add support for the Synaptics RMI4 touchscreen that is found on the
> Nexus 5.
>
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> Signed-off-by: Brian Masney <masneyb@onstation.org>

Looks good to me:
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij
Bjorn Andersson June 16, 2019, 6:40 p.m. UTC | #2
On Sun 02 Jun 18:04 PDT 2019, Brian Masney wrote:

> From: Jonathan Marek <jonathan@marek.ca>
> 
> Add support for the Synaptics RMI4 touchscreen that is found on the
> Nexus 5.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> Signed-off-by: Brian Masney <masneyb@onstation.org>

Applied for 5.3

PS. Please use a --cover-letter when sending multiple patches.

Thanks,
Bjorn

> ---
> This is to be applied on top of the display patch series:
> https://lore.kernel.org/lkml/20190531094619.31704-1-masneyb@onstation.org/
> 
>  .../qcom-msm8974-lge-nexus5-hammerhead.dts    | 64 +++++++++++++++++++
>  1 file changed, 64 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> index c92ea01e3918..06c33bd71620 100644
> --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> @@ -280,6 +280,16 @@
>  			};
>  		};
>  
> +		i2c2_pins: i2c2 {
> +			mux {
> +				pins = "gpio6", "gpio7";
> +				function = "blsp_i2c2";
> +
> +				drive-strength = <2>;
> +				bias-disable;
> +			};
> +		};
> +
>  		i2c3_pins: i2c3 {
>  			mux {
>  				pins = "gpio10", "gpio11";
> @@ -326,6 +336,25 @@
>  				bias-disable;
>  			};
>  		};
> +
> +		touch_pin: touch {
> +			int {
> +				pins = "gpio5";
> +				function = "gpio";
> +
> +				drive-strength = <2>;
> +				bias-disable;
> +				input-enable;
> +			};
> +
> +			reset {
> +				pins = "gpio8";
> +				function = "gpio";
> +
> +				drive-strength = <2>;
> +				bias-pull-up;
> +			};
> +		};
>  	};
>  
>  	sdhci@f9824900 {
> @@ -468,6 +497,41 @@
>  		};
>  	};
>  
> +	i2c@f9924000 {
> +		status = "ok";
> +
> +		clock-frequency = <355000>;
> +		qcom,src-freq = <50000000>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&i2c2_pins>;
> +
> +		synaptics@70 {
> +			compatible = "syna,rmi4-i2c";
> +			reg = <0x70>;
> +
> +			interrupts-extended = <&msmgpio 5 IRQ_TYPE_EDGE_FALLING>;
> +			vdd-supply = <&pm8941_l22>;
> +			vio-supply = <&pm8941_lvs3>;
> +
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&touch_pin>;
> +
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			rmi4-f01@1 {
> +				reg = <0x1>;
> +				syna,nosleep-mode = <1>;
> +			};
> +
> +			rmi4-f12@12 {
> +				reg = <0x12>;
> +				syna,sensor-type = <1>;
> +			};
> +		};
> +	};
> +
>  	i2c@f9925000 {
>  		status = "ok";
>  		pinctrl-names = "default";
> -- 
> 2.20.1
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index c92ea01e3918..06c33bd71620 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -280,6 +280,16 @@ 
 			};
 		};
 
+		i2c2_pins: i2c2 {
+			mux {
+				pins = "gpio6", "gpio7";
+				function = "blsp_i2c2";
+
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+
 		i2c3_pins: i2c3 {
 			mux {
 				pins = "gpio10", "gpio11";
@@ -326,6 +336,25 @@ 
 				bias-disable;
 			};
 		};
+
+		touch_pin: touch {
+			int {
+				pins = "gpio5";
+				function = "gpio";
+
+				drive-strength = <2>;
+				bias-disable;
+				input-enable;
+			};
+
+			reset {
+				pins = "gpio8";
+				function = "gpio";
+
+				drive-strength = <2>;
+				bias-pull-up;
+			};
+		};
 	};
 
 	sdhci@f9824900 {
@@ -468,6 +497,41 @@ 
 		};
 	};
 
+	i2c@f9924000 {
+		status = "ok";
+
+		clock-frequency = <355000>;
+		qcom,src-freq = <50000000>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_pins>;
+
+		synaptics@70 {
+			compatible = "syna,rmi4-i2c";
+			reg = <0x70>;
+
+			interrupts-extended = <&msmgpio 5 IRQ_TYPE_EDGE_FALLING>;
+			vdd-supply = <&pm8941_l22>;
+			vio-supply = <&pm8941_lvs3>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&touch_pin>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			rmi4-f01@1 {
+				reg = <0x1>;
+				syna,nosleep-mode = <1>;
+			};
+
+			rmi4-f12@12 {
+				reg = <0x12>;
+				syna,sensor-type = <1>;
+			};
+		};
+	};
+
 	i2c@f9925000 {
 		status = "ok";
 		pinctrl-names = "default";