From patchwork Thu Jun 6 09:36:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10978943 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A69562D47 for ; Thu, 6 Jun 2019 09:37:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9665228846 for ; Thu, 6 Jun 2019 09:37:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8AAA228847; Thu, 6 Jun 2019 09:37:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,HK_RANDOM_FROM, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 17D7A28847 for ; Thu, 6 Jun 2019 09:37:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 34570894FF; Thu, 6 Jun 2019 09:37:02 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 01D9A895C4 for ; Thu, 6 Jun 2019 09:36:59 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jun 2019 02:36:59 -0700 X-ExtLoop1: 1 Received: from ssirotki-mobl3.ger.corp.intel.com (HELO localhost.localdomain) ([10.251.93.246]) by orsmga006.jf.intel.com with ESMTP; 06 Jun 2019 02:36:58 -0700 From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Thu, 6 Jun 2019 10:36:27 +0100 Message-Id: <20190606093639.9372-10-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190606093639.9372-1-tvrtko.ursulin@linux.intel.com> References: <20190606093639.9372-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/21] drm/i915: Make i915_check_and_clear_faults take uncore X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Continuing the conversion and elimination of implicit dev_priv. Signed-off-by: Tvrtko Ursulin Suggested-by: Rodrigo Vivi --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 34 ++++++++++++----------- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- 4 files changed, 21 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 0e9b74f52503..3554d0dd7b1a 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -453,7 +453,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915) RUNTIME_INFO(i915)->num_engines = hweight32(mask); - i915_check_and_clear_faults(i915); + i915_check_and_clear_faults(&i915->uncore); intel_setup_engine_capabilities(i915); diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 1af6751e1b36..72acd5bc5101 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -2340,7 +2340,7 @@ static int i915_drm_resume_early(struct drm_device *dev) intel_uncore_resume_early(&dev_priv->uncore); - i915_check_and_clear_faults(dev_priv); + i915_check_and_clear_faults(&dev_priv->uncore); if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { gen9_sanitize_dc_state(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 3ba970f2db28..0cecc43a64b0 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2299,14 +2299,14 @@ static bool needs_idle_maps(struct drm_i915_private *dev_priv) return IS_GEN(dev_priv, 5) && IS_MOBILE(dev_priv) && intel_vtd_active(); } -static void gen6_check_faults(struct drm_i915_private *dev_priv) +static void gen6_check_faults(struct intel_uncore *uncore) { struct intel_engine_cs *engine; enum intel_engine_id id; - u32 fault; - for_each_engine(engine, dev_priv, id) { - fault = GEN6_RING_FAULT_REG_READ(engine); + for_each_engine(engine, uncore_to_i915(uncore), id) { + u32 fault = GEN6_RING_FAULT_REG_READ(engine); + if (fault & RING_FAULT_VALID) { DRM_DEBUG_DRIVER("Unexpected fault\n" "\tAddr: 0x%08lx\n" @@ -2321,16 +2321,16 @@ static void gen6_check_faults(struct drm_i915_private *dev_priv) } } -static void gen8_check_faults(struct drm_i915_private *dev_priv) +static void gen8_check_faults(struct intel_uncore *uncore) { - u32 fault = I915_READ(GEN8_RING_FAULT_REG); + u32 fault = intel_uncore_read(uncore, GEN8_RING_FAULT_REG); if (fault & RING_FAULT_VALID) { u32 fault_data0, fault_data1; u64 fault_addr; - fault_data0 = I915_READ(GEN8_FAULT_TLB_DATA0); - fault_data1 = I915_READ(GEN8_FAULT_TLB_DATA1); + fault_data0 = intel_uncore_read(uncore, GEN8_FAULT_TLB_DATA0); + fault_data1 = intel_uncore_read(uncore, GEN8_FAULT_TLB_DATA1); fault_addr = ((u64)(fault_data1 & FAULT_VA_HIGH_BITS) << 44) | ((u64)fault_data0 << 12); @@ -2349,17 +2349,19 @@ static void gen8_check_faults(struct drm_i915_private *dev_priv) } } -void i915_check_and_clear_faults(struct drm_i915_private *dev_priv) +void i915_check_and_clear_faults(struct intel_uncore *uncore) { + struct drm_i915_private *i915 = uncore_to_i915(uncore); + /* From GEN8 onwards we only have one 'All Engine Fault Register' */ - if (INTEL_GEN(dev_priv) >= 8) - gen8_check_faults(dev_priv); - else if (INTEL_GEN(dev_priv) >= 6) - gen6_check_faults(dev_priv); + if (INTEL_GEN(i915) >= 8) + gen8_check_faults(uncore); + else if (INTEL_GEN(i915) >= 6) + gen6_check_faults(uncore); else return; - uncore_clear_error_registers(&dev_priv->uncore, ALL_ENGINES); + uncore_clear_error_registers(uncore, ALL_ENGINES); } void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv) @@ -2372,7 +2374,7 @@ void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv) if (INTEL_GEN(dev_priv) < 6) return; - i915_check_and_clear_faults(dev_priv); + i915_check_and_clear_faults(&dev_priv->uncore); ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total); @@ -3650,7 +3652,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv) struct i915_ggtt *ggtt = &dev_priv->ggtt; struct i915_vma *vma, *vn; - i915_check_and_clear_faults(dev_priv); + i915_check_and_clear_faults(&dev_priv->uncore); mutex_lock(&ggtt->vm.mutex); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 152a03560c22..9ac701988030 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -649,7 +649,7 @@ int gen6_ppgtt_pin(struct i915_hw_ppgtt *base); void gen6_ppgtt_unpin(struct i915_hw_ppgtt *base); void gen6_ppgtt_unpin_all(struct i915_hw_ppgtt *base); -void i915_check_and_clear_faults(struct drm_i915_private *dev_priv); +void i915_check_and_clear_faults(struct intel_uncore *uncore); void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv); void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv);