| Message ID | 20190609143521.19374-1-laurent@vivier.eu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] linux-user: update PPC64 HWCAP2 feature list | expand |
Ping? Le 09/06/2019 à 16:35, Laurent Vivier a écrit : > QEMU_PPC_FEATURE2_VEC_CRYPTO enables the use > of VSX instructions in libcrypto that are accelerated > by the TCG vector instructions now. > > QEMU_PPC_FEATURE2_DARN allows to use the new builtin > qemu_guest_getrandom() function. > > Signed-off-by: Laurent Vivier <laurent@vivier.eu> > --- > linux-user/elfload.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/linux-user/elfload.c b/linux-user/elfload.c > index 5451d262ec8e..5751beff1b64 100644 > --- a/linux-user/elfload.c > +++ b/linux-user/elfload.c > @@ -768,7 +768,13 @@ enum { > QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */ > QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */ > QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */ > + QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000, > + QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000, > QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */ > + QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */ > + QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */ > + QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */ > + QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */ > }; > > #define ELF_HWCAP get_elf_hwcap() > @@ -822,8 +828,10 @@ static uint32_t get_elf_hwcap2(void) > GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL); > GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR); > GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | > - PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07); > - GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00); > + PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 | > + QEMU_PPC_FEATURE2_VEC_CRYPTO); > + GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 | > + QEMU_PPC_FEATURE2_DARN); > > #undef GET_FEATURE > #undef GET_FEATURE2 >
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 5451d262ec8e..5751beff1b64 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -768,7 +768,13 @@ enum { QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */ QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */ QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */ + QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000, + QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000, QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */ + QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */ + QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */ + QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */ + QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */ }; #define ELF_HWCAP get_elf_hwcap() @@ -822,8 +828,10 @@ static uint32_t get_elf_hwcap2(void) GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL); GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR); GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | - PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07); - GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00); + PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 | + QEMU_PPC_FEATURE2_VEC_CRYPTO); + GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 | + QEMU_PPC_FEATURE2_DARN); #undef GET_FEATURE #undef GET_FEATURE2
QEMU_PPC_FEATURE2_VEC_CRYPTO enables the use of VSX instructions in libcrypto that are accelerated by the TCG vector instructions now. QEMU_PPC_FEATURE2_DARN allows to use the new builtin qemu_guest_getrandom() function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> --- linux-user/elfload.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)