| Message ID | 1560169080-27134-19-git-send-email-yong.wu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MT8183 IOMMU SUPPORT | expand |
On 10/06/2019 14:17, Yong Wu wrote: > The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB > mode support for mt2712. this patch add it. > > Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range > for 4GB mode") > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/iommu/mtk_iommu.c | 2 ++ > drivers/iommu/mtk_iommu.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 6053b8b..86158d8 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -719,6 +719,7 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev) > reg->int_control0 = readl_relaxed(base + REG_MMU_INT_CONTROL0); > reg->int_main_control = readl_relaxed(base + REG_MMU_INT_MAIN_CONTROL); > reg->ivrp_paddr = readl_relaxed(base + REG_MMU_IVRP_PADDR); > + reg->vld_pa_rng = readl_relaxed(base + REG_MMU_VLD_PA_RNG); > clk_disable_unprepare(data->bclk); > return 0; > } > @@ -743,6 +744,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) > writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL0); > writel_relaxed(reg->int_main_control, base + REG_MMU_INT_MAIN_CONTROL); > writel_relaxed(reg->ivrp_paddr, base + REG_MMU_IVRP_PADDR); > + writel_relaxed(reg->vld_pa_rng, base + REG_MMU_VLD_PA_RNG); > if (m4u_dom) > writel(m4u_dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK, > base + REG_MMU_PT_BASE_ADDR); > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > index c0b5c65..753266b 100644 > --- a/drivers/iommu/mtk_iommu.h > +++ b/drivers/iommu/mtk_iommu.h > @@ -32,6 +32,7 @@ struct mtk_iommu_suspend_reg { > u32 int_control0; > u32 int_main_control; > u32 ivrp_paddr; > + u32 vld_pa_rng; > }; > > enum mtk_iommu_plat { >
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 6053b8b..86158d8 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -719,6 +719,7 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev) reg->int_control0 = readl_relaxed(base + REG_MMU_INT_CONTROL0); reg->int_main_control = readl_relaxed(base + REG_MMU_INT_MAIN_CONTROL); reg->ivrp_paddr = readl_relaxed(base + REG_MMU_IVRP_PADDR); + reg->vld_pa_rng = readl_relaxed(base + REG_MMU_VLD_PA_RNG); clk_disable_unprepare(data->bclk); return 0; } @@ -743,6 +744,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL0); writel_relaxed(reg->int_main_control, base + REG_MMU_INT_MAIN_CONTROL); writel_relaxed(reg->ivrp_paddr, base + REG_MMU_IVRP_PADDR); + writel_relaxed(reg->vld_pa_rng, base + REG_MMU_VLD_PA_RNG); if (m4u_dom) writel(m4u_dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK, base + REG_MMU_PT_BASE_ADDR); diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index c0b5c65..753266b 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -32,6 +32,7 @@ struct mtk_iommu_suspend_reg { u32 int_control0; u32 int_main_control; u32 ivrp_paddr; + u32 vld_pa_rng; }; enum mtk_iommu_plat {
The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB mode support for mt2712. this patch add it. Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Evan Green <evgreen@chromium.org> --- drivers/iommu/mtk_iommu.c | 2 ++ drivers/iommu/mtk_iommu.h | 1 + 2 files changed, 3 insertions(+)