From patchwork Mon Jun 10 19:32:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10985345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 229F1924 for ; Mon, 10 Jun 2019 19:33:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1311327F17 for ; Mon, 10 Jun 2019 19:33:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 079CB286CD; Mon, 10 Jun 2019 19:33:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B1A4D27F17 for ; Mon, 10 Jun 2019 19:33:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1w-0007hY-WB; Mon, 10 Jun 2019 19:32:32 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1v-0007fS-7t for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:31 +0000 X-Inumbo-ID: 7bfa0d68-8bb6-11e9-a239-6f7b6f0f0c80 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 7bfa0d68-8bb6-11e9-a239-6f7b6f0f0c80; Mon, 10 Jun 2019 19:32:29 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E115346; Mon, 10 Jun 2019 12:32:29 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 25EDD3F73C; Mon, 10 Jun 2019 12:32:28 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:06 +0100 Message-Id: <20190610193215.23704-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 08/17] xen/arm64: head: Rework and document zero_bss() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP On secondary CPUs, zero_bss() will be a NOP because BSS only need to be zeroed once at boot. So the call in the secondary CPUs path can be removed. It also means that x26 does not need to set and is now only used by the boot CPU. Lastly, document the behavior and the main registers usage within the function. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 87fcd3be6c..6aa3148192 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -71,7 +71,7 @@ * x23 - UART address * x24 - * x25 - identity map in place - * x26 - skip_zero_bss + * x26 - skip_zero_bss (boot cpu only) * x27 - * x28 - * x29 - @@ -313,8 +313,6 @@ GLOBAL(init_secondary) sub x20, x19, x0 /* x20 := phys-offset */ mov x22, #1 /* x22 := is_secondary_cpu */ - /* Boot CPU already zero BSS so skip it on secondary CPUs. */ - mov x26, #1 /* X26 := skip_zero_bss */ mrs x0, mpidr_el1 ldr x13, =(~MPIDR_HWID_MASK) @@ -337,7 +335,6 @@ GLOBAL(init_secondary) PRINT(" booting -\r\n") #endif bl check_cpu_mode - bl zero_bss bl cpu_init bl create_page_tables bl enable_mmu @@ -375,6 +372,14 @@ check_cpu_mode: b fail ENDPROC(check_cpu_mode) +/* + * Zero BSS + * + * Inputs: + * x26: Do we need to zero BSS? + * + * Clobbers x0 - x3 + */ zero_bss: /* Zero BSS only when requested */ cbnz x26, skip_bss