From patchwork Mon Jun 10 19:32:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10985347 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 61655924 for ; Mon, 10 Jun 2019 19:33:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5052228613 for ; Mon, 10 Jun 2019 19:33:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4438A286D6; Mon, 10 Jun 2019 19:33:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3ADA1286CD for ; Mon, 10 Jun 2019 19:33:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1q-0007d1-I0; Mon, 10 Jun 2019 19:32:26 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1o-0007ck-Hi for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:24 +0000 X-Inumbo-ID: 78b1c5f8-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 78b1c5f8-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:23 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 746D3C15; Mon, 10 Jun 2019 12:32:23 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C61F3F73C; Mon, 10 Jun 2019 12:32:22 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:01 +0100 Message-Id: <20190610193215.23704-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 03/17] xen/arm64: head: Rework UART initialization on boot CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Anything executed after the label common_start can be executed on all CPUs. However most of the instructions executed between the label common_start and init_uart are not executed on the boot CPU. The only instructions executed are to lookup the CPUID so it can be printed on the console (if earlyprintk is enabled). Printing the CPUID is not entirely useful to have for the boot CPU and requires a conditional branch to bypass unused instructions. Furthermore, the function init_uart is only called for boot CPU requiring another conditional branch. This makes the code a bit tricky to follow. The UART initialization is now moved before the label common_start. This now requires to have a slightly altered print for the boot CPU and set the early UART base address in each the two path (boot CPU and secondary CPUs). This has the nice effect to remove a couple of conditional branch in the code. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index a5147c8d80..fd432ee15d 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -265,6 +265,12 @@ real_start_efi: load_paddr x21, _sdtb #endif + /* Initialize the UART if earlyprintk has been enabled. */ +#ifdef CONFIG_EARLY_PRINTK + bl init_uart +#endif + PRINT("- Boot CPU booting -\r\n") + mov x22, #0 /* x22 := is_secondary_cpu */ b common_start @@ -281,14 +287,11 @@ GLOBAL(init_secondary) /* Boot CPU already zero BSS so skip it on secondary CPUs. */ mov x26, #1 /* X26 := skip_zero_bss */ -common_start: mrs x0, mpidr_el1 ldr x13, =(~MPIDR_HWID_MASK) bic x24, x0, x13 /* Mask out flags to get CPU ID */ - /* Non-boot CPUs wait here until __cpu_up is ready for them */ - cbz x22, 1f - + /* Wait here until __cpu_up is ready to handle the CPU */ load_paddr x0, smp_up_cpu dsb sy 2: ldr x1, [x0] @@ -300,14 +303,14 @@ common_start: #ifdef CONFIG_EARLY_PRINTK ldr x23, =EARLY_UART_BASE_ADDRESS /* x23 := UART base address */ - cbnz x22, 1f - bl init_uart /* Boot CPU sets up the UART too */ -1: PRINT("- CPU ") + PRINT("- CPU ") mov x0, x24 bl putn PRINT(" booting -\r\n") #endif +common_start: + PRINT("- Current EL ") mrs x4, CurrentEL mov x0, x4 @@ -628,10 +631,16 @@ ENTRY(switch_ttbr) ret #ifdef CONFIG_EARLY_PRINTK -/* Bring up the UART. - * x23: Early UART base address - * Clobbers x0-x1 */ +/* + * Initialize the UART. Should only be called on the boot CPU. + * + * Ouput: + * x23: Early UART base physical address + * + * Clobbers x0 - x1 + */ init_uart: + ldr x23, =EARLY_UART_BASE_ADDRESS #ifdef EARLY_PRINTK_INIT_UART early_uart_init x23, 0 #endif