[11/17] xen/arm64: head: Document enable_mmu()
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Message ID 20190610193215.23704-12-julien.grall@arm.com
State New, archived
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Series
  • xen/arm64: Rework head.S to make it more compliant with the Arm Arm
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Commit Message

Julien Grall June 10, 2019, 7:32 p.m. UTC
Document the behavior and the main registers usage within enable_mmu().

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/arm64/head.S | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Stefano Stabellini June 26, 2019, 1:03 a.m. UTC | #1
On Mon, 10 Jun 2019, Julien Grall wrote:
> Document the behavior and the main registers usage within enable_mmu().
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---
>  xen/arch/arm/arm64/head.S | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
> index 7b92c1c8eb..d673f7c0d8 100644
> --- a/xen/arch/arm/arm64/head.S
> +++ b/xen/arch/arm/arm64/head.S
> @@ -583,6 +583,13 @@ virtphys_clash:
>          ret
>  ENDPROC(create_page_tables)
>  
> +/*
> + * Turn on the Data Cache and the MMU. The function will return on the ID
> + * mapping. In other word, the caller is responsible to switch to the runtime
> + * mapping.
> + *
> + * Clobbers x0 - x1
> + */

as it calls PRINT, shouldn't it be x0 - x3?

>  enable_mmu:
>          PRINT("- Turning on paging -\r\n")
>  
> -- 
> 2.11.0
>
Julien Grall June 26, 2019, 11:23 a.m. UTC | #2
Hi Stefano,

On 26/06/2019 02:03, Stefano Stabellini wrote:
> On Mon, 10 Jun 2019, Julien Grall wrote:
>> Document the behavior and the main registers usage within enable_mmu().
>>
>> Signed-off-by: Julien Grall <julien.grall@arm.com>
>> ---
>>   xen/arch/arm/arm64/head.S | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
>> index 7b92c1c8eb..d673f7c0d8 100644
>> --- a/xen/arch/arm/arm64/head.S
>> +++ b/xen/arch/arm/arm64/head.S
>> @@ -583,6 +583,13 @@ virtphys_clash:
>>           ret
>>   ENDPROC(create_page_tables)
>>   
>> +/*
>> + * Turn on the Data Cache and the MMU. The function will return on the ID
>> + * mapping. In other word, the caller is responsible to switch to the runtime
>> + * mapping.
>> + *
>> + * Clobbers x0 - x1
>> + */
> 
> as it calls PRINT, shouldn't it be x0 - x3?

You are right. I will update the comment.

Cheers,

Patch
diff mbox series

diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index 7b92c1c8eb..d673f7c0d8 100644
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -583,6 +583,13 @@  virtphys_clash:
         ret
 ENDPROC(create_page_tables)
 
+/*
+ * Turn on the Data Cache and the MMU. The function will return on the ID
+ * mapping. In other word, the caller is responsible to switch to the runtime
+ * mapping.
+ *
+ * Clobbers x0 - x1
+ */
 enable_mmu:
         PRINT("- Turning on paging -\r\n")