diff mbox series

[v2,07/99] ram: rk3399: Move macro after include files

Message ID 20190617073252.27810-8-jagan@amarulasolutions.com (mailing list archive)
State New, archived
Headers show
Series ram: rk3399: Add LPDDR4 support | expand

Commit Message

Jagan Teki June 17, 2019, 7:31 a.m. UTC
Move the macro definitions after include files for better
code readability and to satisfy coding style.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/ram/rockchip/sdram_rk3399.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

Comments

Kever Yang July 15, 2019, 12:39 p.m. UTC | #1
Jagan,

On 2019/6/17 下午3:31, Jagan Teki wrote:
> Move the macro definitions after include files for better
> code readability and to satisfy coding style.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>


Maybe all the patches for clean up only for sdram_rk3399.c, with out 
code logic

change, can squash into one  commit?


Thanks,

- Kever

> ---
>   drivers/ram/rockchip/sdram_rk3399.c | 26 +++++++++++++-------------
>   1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index e6f52c9f59..20a3e89c17 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -22,6 +22,19 @@
>   #include <linux/err.h>
>   #include <time.h>
>   
> +#define PRESET_SGRF_HOLD(n)	((0x1 << (6 + 16)) | ((n) << 6))
> +#define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
> +#define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
> +
> +#define PHY_DRV_ODT_HI_Z	0x0
> +#define PHY_DRV_ODT_240		0x1
> +#define PHY_DRV_ODT_120		0x8
> +#define PHY_DRV_ODT_80		0x9
> +#define PHY_DRV_ODT_60		0xc
> +#define PHY_DRV_ODT_48		0xd
> +#define PHY_DRV_ODT_40		0xe
> +#define PHY_DRV_ODT_34_3	0xf
> +
>   struct chan_info {
>   	struct rk3399_ddr_pctl_regs *pctl;
>   	struct rk3399_ddr_pi_regs *pi;
> @@ -43,19 +56,6 @@ struct dram_info {
>   	struct rk3399_pmugrf_regs *pmugrf;
>   };
>   
> -#define PRESET_SGRF_HOLD(n)	((0x1 << (6 + 16)) | ((n) << 6))
> -#define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
> -#define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
> -
> -#define PHY_DRV_ODT_HI_Z	0x0
> -#define PHY_DRV_ODT_240		0x1
> -#define PHY_DRV_ODT_120		0x8
> -#define PHY_DRV_ODT_80		0x9
> -#define PHY_DRV_ODT_60		0xc
> -#define PHY_DRV_ODT_48		0xd
> -#define PHY_DRV_ODT_40		0xe
> -#define PHY_DRV_ODT_34_3	0xf
> -
>   #if defined(CONFIG_TPL_BUILD) || \
>   	(!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
>
diff mbox series

Patch

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index e6f52c9f59..20a3e89c17 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -22,6 +22,19 @@ 
 #include <linux/err.h>
 #include <time.h>
 
+#define PRESET_SGRF_HOLD(n)	((0x1 << (6 + 16)) | ((n) << 6))
+#define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
+#define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
+
+#define PHY_DRV_ODT_HI_Z	0x0
+#define PHY_DRV_ODT_240		0x1
+#define PHY_DRV_ODT_120		0x8
+#define PHY_DRV_ODT_80		0x9
+#define PHY_DRV_ODT_60		0xc
+#define PHY_DRV_ODT_48		0xd
+#define PHY_DRV_ODT_40		0xe
+#define PHY_DRV_ODT_34_3	0xf
+
 struct chan_info {
 	struct rk3399_ddr_pctl_regs *pctl;
 	struct rk3399_ddr_pi_regs *pi;
@@ -43,19 +56,6 @@  struct dram_info {
 	struct rk3399_pmugrf_regs *pmugrf;
 };
 
-#define PRESET_SGRF_HOLD(n)	((0x1 << (6 + 16)) | ((n) << 6))
-#define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
-#define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
-
-#define PHY_DRV_ODT_HI_Z	0x0
-#define PHY_DRV_ODT_240		0x1
-#define PHY_DRV_ODT_120		0x8
-#define PHY_DRV_ODT_80		0x9
-#define PHY_DRV_ODT_60		0xc
-#define PHY_DRV_ODT_48		0xd
-#define PHY_DRV_ODT_40		0xe
-#define PHY_DRV_ODT_34_3	0xf
-
 #if defined(CONFIG_TPL_BUILD) || \
 	(!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))