[31/33] drm/i915: Make timelines gt centric

Message ID	20190618130345.6135-32-tvrtko.ursulin@linux.intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> To: Intel-gfx@lists.freedesktop.org Date: Tue, 18 Jun 2019 14:03:43 +0100 Message-Id: <20190618130345.6135-32-tvrtko.ursulin@linux.intel.com> In-Reply-To: <20190618130345.6135-1-tvrtko.ursulin@linux.intel.com> References: <20190618130345.6135-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 31/33] drm/i915: Make timelines gt centric Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	Implicit dev_priv removal and GT compartmentalization \| expand [v6,00/33] Implicit dev_priv removal and GT compartmentalization [01/33] drm/i915: Convert intel_vgt_(de)balloon to uncore [02/33] drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt [03/33] drm/i915: Move intel_gt initialization to a separate file [04/33] drm/i915: Store some backpointers in struct intel_gt [05/33] drm/i915: Move intel_gt_pm_init under intel_gt_init_early [06/33] drm/i915: Make i915_check_and_clear_faults take intel_gt [07/33] drm/i915: Convert i915_gem_init_swizzling to intel_gt [08/33] drm/i915: Use intel_uncore_rmw in intel_gt_init_swizzling [09/33] drm/i915: Convert init_unused_rings to intel_gt [10/33] drm/i915: Convert gt workarounds to intel_gt [11/33] drm/i915: Store backpointer to intel_gt in the engine [12/33] drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt [13/33] drm/i915: Convert i915_ppgtt_init_hw to intel_gt [14/33] drm/i915: Consolidate some open coded mmio rmw [15/33] drm/i915: Convert i915_gem_init_hw to intel_gt [16/33] drm/i915: Move intel_engines_resume into common init [17/33] drm/i915: Stop using I915_READ/WRITE in intel_wopcm_init_hw [18/33] drm/i915: Compartmentalize i915_ggtt_probe_hw [19/33] drm/i915: Compartmentalize i915_ggtt_init_hw [20/33] drm/i915: Make ggtt invalidation work on ggtt [21/33] drm/i915: Store intel_gt backpointer in vm [22/33] drm/i915: Compartmentalize i915_gem_suspend/restore_gtt_mappings [23/33] drm/i915: Convert i915_gem_flush_ggtt_writes to intel_gt [24/33] drm/i915: Move i915_gem_chipset_flush to intel_gt [25/33] drm/i915: Compartmentalize timeline_init/park/fini [26/33] drm/i915: Compartmentalize i915_ggtt_cleanup_hw [27/33] drm/i915: Compartmentalize i915_gem_init_ggtt [28/33] drm/i915: Store ggtt pointer in intel_gt [29/33] drm/i915: Compartmentalize ring buffer creation [30/33] drm/i915: Save trip via top-level i915 in a few more places [31/33] drm/i915: Make timelines gt centric [32/33] drm/i915: Rename i915_timeline to intel_timeline and move under gt [33/33] drm/i915: Eliminate dual personality of i915_scratch_offset

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 0f2c22a3bcb6..1a1f6ca19a87 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -530,7 +530,7 @@ i915_gem_create_context(struct drm_i915_private *dev_priv, unsigned int flags) if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) { struct i915_timeline *timeline; - timeline = i915_timeline_create(dev_priv, NULL); + timeline = i915_timeline_create(&dev_priv->gt, NULL); if (IS_ERR(timeline)) { context_close(ctx); return ERR_CAST(timeline); diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index f34797e11a70..c2afc8d34aa2 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -736,8 +736,8 @@ static int measure_breadcrumb_dw(struct intel_engine_cs *engine) if (!frame) return -ENOMEM; - if (i915_timeline_init(engine->i915, - &frame->timeline, + if (i915_timeline_init(&frame->timeline, + engine->gt, engine->status_page.vma)) goto out_frame; diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 199273de498c..20f07dbf5be9 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -2937,12 +2937,13 @@ populate_lr_context(struct intel_context *ce, return ret; } -static struct i915_timeline *get_timeline(struct i915_gem_context *ctx) +static struct i915_timeline * +get_timeline(struct i915_gem_context *ctx, struct intel_gt *gt) { if (ctx->timeline) return i915_timeline_get(ctx->timeline); else - return i915_timeline_create(ctx->i915, NULL); + return i915_timeline_create(gt, NULL); } static int execlists_context_deferred_alloc(struct intel_context *ce, @@ -2976,7 +2977,7 @@ static int execlists_context_deferred_alloc(struct intel_context *ce, goto error_deref_obj; } - timeline = get_timeline(ce->gem_context); + timeline = get_timeline(ce->gem_context, engine->gt); if (IS_ERR(timeline)) { ret = PTR_ERR(timeline); goto error_deref_obj; diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c index da67215f8e52..f24dbc5a20e1 100644 --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c @@ -2263,7 +2263,7 @@ int intel_ring_submission_init(struct intel_engine_cs *engine) struct intel_ring *ring; int err; - timeline = i915_timeline_create(engine->i915, engine->status_page.vma); + timeline = i915_timeline_create(engine->gt, engine->status_page.vma); if (IS_ERR(timeline)) { err = PTR_ERR(timeline); goto err; diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c index 086801b51441..b80ec0f53111 100644 --- a/drivers/gpu/drm/i915/gt/mock_engine.c +++ b/drivers/gpu/drm/i915/gt/mock_engine.c @@ -56,7 +56,7 @@ static struct intel_ring *mock_ring(struct intel_engine_cs *engine) if (!ring) return NULL; - if (i915_timeline_init(engine->i915, &ring->timeline, NULL)) { + if (i915_timeline_init(&ring->timeline, engine->gt, NULL)) { kfree(ring); return NULL; } diff --git a/drivers/gpu/drm/i915/i915_timeline.c b/drivers/gpu/drm/i915/i915_timeline.c index dc885a13b16d..3e2c3169dc69 100644 --- a/drivers/gpu/drm/i915/i915_timeline.c +++ b/drivers/gpu/drm/i915/i915_timeline.c @@ -4,6 +4,8 @@ * Copyright © 2016-2018 Intel Corporation */ +#include "gt/intel_gt_types.h" + #include "i915_drv.h" #include "i915_active.h" @@ -14,7 +16,8 @@ #define ptr_test_bit(ptr, bit) ((unsigned long)(ptr) & BIT(bit)) struct i915_timeline_hwsp { - struct i915_gt_timelines *gt; + struct intel_gt *gt; + struct i915_gt_timelines *gt_timelines; struct list_head free_link; struct i915_vma *vma; u64 free_bitmap; @@ -28,14 +31,9 @@ struct i915_timeline_cacheline { #define CACHELINE_FREE CACHELINE_BITS }; -static inline struct drm_i915_private * -hwsp_to_i915(struct i915_timeline_hwsp *hwsp) -{ - return container_of(hwsp->gt, struct drm_i915_private, gt.timelines); -} - -static struct i915_vma *__hwsp_alloc(struct drm_i915_private *i915) +static struct i915_vma *__hwsp_alloc(struct intel_gt *gt) { + struct drm_i915_private *i915 = gt->i915; struct drm_i915_gem_object *obj; struct i915_vma *vma; @@ -45,7 +43,7 @@ static struct i915_vma *__hwsp_alloc(struct drm_i915_private *i915) i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC); - vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL); + vma = i915_vma_instance(obj, &gt->ggtt->vm, NULL); if (IS_ERR(vma)) i915_gem_object_put(obj); @@ -55,8 +53,7 @@ static struct i915_vma *__hwsp_alloc(struct drm_i915_private *i915) static struct i915_vma * hwsp_alloc(struct i915_timeline *timeline, unsigned int *cacheline) { - struct drm_i915_private *i915 = timeline->i915; - struct i915_gt_timelines *gt = &i915->gt.timelines; + struct i915_gt_timelines *gt = &timeline->gt->timelines; struct i915_timeline_hwsp *hwsp; BUILD_BUG_ON(BITS_PER_TYPE(u64) * CACHELINE_BYTES > PAGE_SIZE); @@ -75,16 +72,17 @@ hwsp_alloc(struct i915_timeline *timeline, unsigned int *cacheline) if (!hwsp) return ERR_PTR(-ENOMEM); - vma = __hwsp_alloc(i915); + vma = __hwsp_alloc(timeline->gt); if (IS_ERR(vma)) { kfree(hwsp); return vma; } vma->private = hwsp; + hwsp->gt = timeline->gt; hwsp->vma = vma; hwsp->free_bitmap = ~0ull; - hwsp->gt = gt; + hwsp->gt_timelines = gt; spin_lock_irq(&gt->hwsp_lock); list_add(&hwsp->free_link, &gt->hwsp_free_list); @@ -104,7 +102,7 @@ hwsp_alloc(struct i915_timeline *timeline, unsigned int *cacheline) static void __idle_hwsp_free(struct i915_timeline_hwsp *hwsp, int cacheline) { - struct i915_gt_timelines *gt = hwsp->gt; + struct i915_gt_timelines *gt = hwsp->gt_timelines; unsigned long flags; spin_lock_irqsave(&gt->hwsp_lock, flags); @@ -170,7 +168,7 @@ cacheline_alloc(struct i915_timeline_hwsp *hwsp, unsigned int cacheline) cl->hwsp = hwsp; cl->vaddr = page_pack_bits(vaddr, cacheline); - i915_active_init(hwsp_to_i915(hwsp), &cl->active, __cacheline_retire); + i915_active_init(hwsp->gt->i915, &cl->active, __cacheline_retire); return cl; } @@ -196,8 +194,8 @@ static void cacheline_free(struct i915_timeline_cacheline *cl) __idle_cacheline_free(cl); } -int i915_timeline_init(struct drm_i915_private *i915, - struct i915_timeline *timeline, +int i915_timeline_init(struct i915_timeline *timeline, + struct intel_gt *gt, struct i915_vma *hwsp) { void *vaddr; @@ -212,7 +210,7 @@ int i915_timeline_init(struct drm_i915_private *i915, */ BUILD_BUG_ON(KSYNCMAP < I915_NUM_ENGINES); - timeline->i915 = i915; + timeline->gt = gt; timeline->pin_count = 0; timeline->has_initial_breadcrumb = !hwsp; timeline->hwsp_cacheline = NULL; @@ -282,7 +280,7 @@ void i915_timelines_init(struct drm_i915_private *i915) static void timeline_add_to_active(struct i915_timeline *tl) { - struct i915_gt_timelines *gt = &tl->i915->gt.timelines; + struct i915_gt_timelines *gt = &tl->gt->timelines; mutex_lock(&gt->mutex); list_add(&tl->link, &gt->active_list); @@ -291,7 +289,7 @@ static void timeline_add_to_active(struct i915_timeline *tl) static void timeline_remove_from_active(struct i915_timeline *tl) { - struct i915_gt_timelines *gt = &tl->i915->gt.timelines; + struct i915_gt_timelines *gt = &tl->gt->timelines; mutex_lock(&gt->mutex); list_del(&tl->link); @@ -347,8 +345,7 @@ void i915_timeline_fini(struct i915_timeline *timeline) } struct i915_timeline * -i915_timeline_create(struct drm_i915_private *i915, - struct i915_vma *global_hwsp) +i915_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp) { struct i915_timeline *timeline; int err; @@ -357,7 +354,7 @@ i915_timeline_create(struct drm_i915_private *i915, if (!timeline) return ERR_PTR(-ENOMEM); - err = i915_timeline_init(i915, timeline, global_hwsp); + err = i915_timeline_init(timeline, gt, global_hwsp); if (err) { kfree(timeline); return ERR_PTR(err); diff --git a/drivers/gpu/drm/i915/i915_timeline.h b/drivers/gpu/drm/i915/i915_timeline.h index 36e5e5a65155..a454d49f229f 100644 --- a/drivers/gpu/drm/i915/i915_timeline.h +++ b/drivers/gpu/drm/i915/i915_timeline.h @@ -31,14 +31,13 @@ #include "i915_syncmap.h" #include "i915_timeline_types.h" -int i915_timeline_init(struct drm_i915_private *i915, - struct i915_timeline *tl, +int i915_timeline_init(struct i915_timeline *tl, + struct intel_gt *gt, struct i915_vma *hwsp); void i915_timeline_fini(struct i915_timeline *tl); struct i915_timeline * -i915_timeline_create(struct drm_i915_private *i915, - struct i915_vma *global_hwsp); +i915_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp); static inline struct i915_timeline * i915_timeline_get(struct i915_timeline *timeline) diff --git a/drivers/gpu/drm/i915/i915_timeline_types.h b/drivers/gpu/drm/i915/i915_timeline_types.h index fce5cb4f1090..931585e12d41 100644 --- a/drivers/gpu/drm/i915/i915_timeline_types.h +++ b/drivers/gpu/drm/i915/i915_timeline_types.h @@ -59,7 +59,7 @@ struct i915_timeline { struct i915_syncmap *sync; struct list_head link; - struct drm_i915_private *i915; + struct intel_gt *gt; struct kref kref; }; diff --git a/drivers/gpu/drm/i915/selftests/i915_timeline.c b/drivers/gpu/drm/i915/selftests/i915_timeline.c index 724bf3650b3e..9eb4e9ab8557 100644 --- a/drivers/gpu/drm/i915/selftests/i915_timeline.c +++ b/drivers/gpu/drm/i915/selftests/i915_timeline.c @@ -66,7 +66,7 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist *state, unsigned long cacheline; int err; - tl = i915_timeline_create(state->i915, NULL); + tl = i915_timeline_create(&state->i915->gt, NULL); if (IS_ERR(tl)) return PTR_ERR(tl); @@ -448,7 +448,7 @@ tl_write(struct i915_timeline *tl, struct intel_engine_cs *engine, u32 value) struct i915_request *rq; int err; - lockdep_assert_held(&tl->i915->drm.struct_mutex); /* lazy rq refs */ + lockdep_assert_held(&tl->gt->i915->drm.struct_mutex); /* lazy rq refs */ err = i915_timeline_pin(tl); if (err) { @@ -478,7 +478,7 @@ checked_i915_timeline_create(struct drm_i915_private *i915) { struct i915_timeline *tl; - tl = i915_timeline_create(i915, NULL); + tl = i915_timeline_create(&i915->gt, NULL); if (IS_ERR(tl)) return tl; @@ -660,7 +660,7 @@ static int live_hwsp_wrap(void *arg) mutex_lock(&i915->drm.struct_mutex); wakeref = intel_runtime_pm_get(&i915->runtime_pm); - tl = i915_timeline_create(i915, NULL); + tl = i915_timeline_create(&i915->gt, NULL); if (IS_ERR(tl)) { err = PTR_ERR(tl); goto out_rpm; diff --git a/drivers/gpu/drm/i915/selftests/mock_timeline.c b/drivers/gpu/drm/i915/selftests/mock_timeline.c index 65b52be23d42..c80ac0fbdd3b 100644 --- a/drivers/gpu/drm/i915/selftests/mock_timeline.c +++ b/drivers/gpu/drm/i915/selftests/mock_timeline.c @@ -10,7 +10,7 @@ void mock_timeline_init(struct i915_timeline *timeline, u64 context) { - timeline->i915 = NULL; + timeline->gt = NULL; timeline->fence_context = context; mutex_init(&timeline->mutex);

[31/33] drm/i915: Make timelines gt centric

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