Message ID | 20190619233134.20009-1-jose.souza@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/2] drm/i915/ehl/dsi: Set lane latency optimization for DW1 | expand |
On Thu, 2019-06-20 at 15:08 +0000, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/2] drm/i915/ehl/dsi: Set lane > latency optimization for DW1 > URL : https://patchwork.freedesktop.org/series/62417/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_6312_full -> Patchwork_13356_full > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. Pushed to dinq, thanks for the reviews. > > > > Known issues > ------------ > > Here are the changes found in Patchwork_13356_full that come from > known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_eio@in-flight-contexts-1us: > - shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([fdo#110913 > ]) +2 similar issues > [1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl6/igt@gem_eio@in-flight-contexts-1us.html > [2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-kbl6/igt@gem_eio@in-flight-contexts-1us.html > > * igt@gem_workarounds@suspend-resume-context: > - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) > +2 similar issues > [3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl4/igt@gem_workarounds@suspend-resume-context.html > [4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-apl5/igt@gem_workarounds@suspend-resume-context.html > > * igt@i915_pm_rc6_residency@rc6-accuracy: > - shard-snb: [PASS][5] -> [SKIP][6] ([fdo#109271]) > [5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb1/igt@i915_pm_rc6_residency@rc6-accuracy.html > [6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-snb5/igt@i915_pm_rc6_residency@rc6-accuracy.html > > * igt@kms_flip@flip-vs-suspend: > - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([fdo#109507]) > [7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl8/igt@kms_flip@flip-vs-suspend.html > [8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-skl5/igt@kms_flip@flip-vs-suspend.html > - shard-glk: [PASS][9] -> [INCOMPLETE][10] ([fdo#103359] > / [k.org#198133]) > [9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-glk9/igt@kms_flip@flip-vs-suspend.html > [10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-glk6/igt@kms_flip@flip-vs-suspend.html > > * igt@kms > _frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite: > - shard-hsw: [PASS][11] -> [SKIP][12] ([fdo#109271]) +19 > similar issues > [11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html > [12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html > > * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: > - shard-skl: [PASS][13] -> [INCOMPLETE][14] > ([fdo#104108]) > [13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html > [14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-skl10/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html > > * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: > - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145]) > [15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html > [16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html > > * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: > - shard-kbl: [PASS][17] -> [DMESG-FAIL][18] > ([fdo#105763]) > [17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl1/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html > [18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-kbl3/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html > > * igt@perf_pmu@rc6: > - shard-kbl: [PASS][19] -> [SKIP][20] ([fdo#109271]) > [19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl7/igt@perf_pmu@rc6.html > [20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-kbl2/igt@perf_pmu@rc6.html > > > #### Possible fixes #### > > * igt@gem_eio@wait-10ms: > - shard-apl: [DMESG-WARN][21] ([fdo#110913 ]) -> > [PASS][22] +1 similar issue > [21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl8/igt@gem_eio@wait-10ms.html > [22]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-apl5/igt@gem_eio@wait-10ms.html > > * igt@gem > _persistent_relocs@forked-interruptible-faulting-reloc-thrashing: > - shard-kbl: [DMESG-WARN][23] ([fdo#110913 ]) -> > [PASS][24] > [23]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html > [24]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-kbl6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html > > * igt@kms_cursor_edge_walk@pipe-b-128x128-top-edge: > - shard-snb: [SKIP][25] ([fdo#109271] / [fdo#109278]) -> > [PASS][26] > [25]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb2/igt@kms_cursor_edge_walk@pipe-b-128x128-top-edge.html > [26]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-snb2/igt@kms_cursor_edge_walk@pipe-b-128x128-top-edge.html > > * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: > - shard-glk: [FAIL][27] ([fdo#104873]) -> [PASS][28] > [27]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html > [28]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html > > * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: > - shard-hsw: [SKIP][29] ([fdo#109271]) -> [PASS][30] +23 > similar issues > [29]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-hsw1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html > [30]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-hsw6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html > > * igt@kms_frontbuffer_tracking@fbc-suspend: > - shard-apl: [DMESG-WARN][31] ([fdo#108566]) -> > [PASS][32] > [31]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl3/igt@kms_frontbuffer_tracking@fbc-suspend.html > [32]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html > > * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: > - shard-skl: [INCOMPLETE][33] ([fdo#104108]) -> > [PASS][34] > [33]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html > [34]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-skl10/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html > > * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: > - shard-snb: [SKIP][35] ([fdo#109271]) -> [PASS][36] +1 > similar issue > [35]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb2/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html > [36]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/shard-snb2/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html > > > [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359 > [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 > [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873 > [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 > [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 > [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 > [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 > [fdo#110913 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110913 > [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 > > > Participating hosts (10 -> 9) > ------------------------------ > > Missing (1): shard-iclb > > > Build changes > ------------- > > * Linux: CI_DRM_6312 -> Patchwork_13356 > > CI_DRM_6312: 034e3ac6a2d180d188da927388b60c7e62c5655b @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_5061: c88ced79a7b71aec58f1d9c5c599ac2f431bcf7a @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_13356: 691b808bac74a60337583445f6bbbf087c734e63 @ > git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ > git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13356/
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 74448e6bf749..8b4d589be4b4 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -403,6 +403,19 @@ static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder) tmp &= ~FRC_LATENCY_OPTIM_MASK; tmp |= FRC_LATENCY_OPTIM_VAL(0x5); I915_WRITE(ICL_PORT_TX_DW2_GRP(port), tmp); + + /* For EHL set latency optimization for PCS_DW1 lanes */ + if (IS_ELKHARTLAKE(dev_priv)) { + tmp = I915_READ(ICL_PORT_PCS_DW1_AUX(port)); + tmp &= ~LATENCY_OPTIM_MASK; + tmp |= LATENCY_OPTIM_VAL(0); + I915_WRITE(ICL_PORT_PCS_DW1_AUX(port), tmp); + + tmp = I915_READ(ICL_PORT_PCS_DW1_LN0(port)); + tmp &= ~LATENCY_OPTIM_MASK; + tmp |= LATENCY_OPTIM_VAL(0x1); + I915_WRITE(ICL_PORT_PCS_DW1_GRP(port), tmp); + } } } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d98142940c38..95b41676ae9d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1896,6 +1896,8 @@ enum i915_power_well_id { #define ICL_PORT_PCS_DW1_GRP(port) _MMIO(_ICL_PORT_PCS_DW_GRP(1, port)) #define ICL_PORT_PCS_DW1_LN0(port) _MMIO(_ICL_PORT_PCS_DW_LN(1, 0, port)) #define COMMON_KEEPER_EN (1 << 26) +#define LATENCY_OPTIM_MASK (0x3 << 2) +#define LATENCY_OPTIM_VAL(x) ((x) << 2) /* CNL/ICL Port TX registers */ #define _CNL_PORT_TX_AE_GRP_OFFSET 0x162340