Message ID | 1561021202-13789-1-git-send-email-wanpengli@tencent.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: VMX: Raise #GP when guest read/write forbidden IA32_XSS | expand |
On 20/06/19 11:00, Wanpeng Li wrote: > From: Wanpeng Li <wanpengli@tencent.com> > > Raise #GP when guest read/write forbidden IA32_XSS. > > Fixes: 203000993de5 (kvm: vmx: add MSR logic for XSAVES) > Reported-by: Xiaoyao Li <xiaoyao.li@linux.intel.com> > Reported-by: Tao Xu <tao3.xu@intel.com> > Cc: Cc: Paolo Bonzini <pbonzini@redhat.com> > Cc: Radim Krčmář <rkrcmar@redhat.com> > Cc: stable@vger.kernel.org > Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Queued, thanks. Paolo > --- > arch/x86/kvm/vmx/vmx.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index b939a68..d174b62 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -1732,7 +1732,10 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, > &msr_info->data); > case MSR_IA32_XSS: > - if (!vmx_xsaves_supported()) > + if (!vmx_xsaves_supported() || > + (!msr_info->host_initiated && > + !(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && > + guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)))) > return 1; > msr_info->data = vcpu->arch.ia32_xss; > break; > @@ -1962,7 +1965,10 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > return 1; > return vmx_set_vmx_msr(vcpu, msr_index, data); > case MSR_IA32_XSS: > - if (!vmx_xsaves_supported()) > + if (!vmx_xsaves_supported() || > + (!msr_info->host_initiated && > + !(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && > + guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)))) > return 1; > /* > * The only supported bit as of Skylake is bit 8, but > -- 2.7.4 >
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index b939a68..d174b62 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1732,7 +1732,10 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, &msr_info->data); case MSR_IA32_XSS: - if (!vmx_xsaves_supported()) + if (!vmx_xsaves_supported() || + (!msr_info->host_initiated && + !(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && + guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)))) return 1; msr_info->data = vcpu->arch.ia32_xss; break; @@ -1962,7 +1965,10 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; return vmx_set_vmx_msr(vcpu, msr_index, data); case MSR_IA32_XSS: - if (!vmx_xsaves_supported()) + if (!vmx_xsaves_supported() || + (!msr_info->host_initiated && + !(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && + guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)))) return 1; /* * The only supported bit as of Skylake is bit 8, but