| Message ID | 1561345379-2429-4-git-send-email-skomatineni@nvidia.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | SC7 entry and exit support for Tegra210 | expand |
On Mon, Jun 24, 2019 at 5:03 AM Sowjanya Komatineni <skomatineni@nvidia.com> wrote: > During SC7 resume, PARKED bit clear from the pinmux registers may > cause a glitch on the GPIO lines. > > So, Tegra GPIOs restore should happen prior to restoring Tegra pinmux > to keep the GPIO lines in a known good state prior to clearing PARKED > bit. > > This patch has fix for this by moving Tegra GPIOs restore to happen > very early than pinctrl resume. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Can this patch be applied in isolation from the other patches? WOuld be nice to have at least Thierry's ACK on it before I apply it. Yours, Linus Walleij
On Sun, Jun 23, 2019 at 08:02:44PM -0700, Sowjanya Komatineni wrote: > During SC7 resume, PARKED bit clear from the pinmux registers may > cause a glitch on the GPIO lines. > > So, Tegra GPIOs restore should happen prior to restoring Tegra pinmux > to keep the GPIO lines in a known good state prior to clearing PARKED > bit. > > This patch has fix for this by moving Tegra GPIOs restore to happen > very early than pinctrl resume. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > --- > drivers/gpio/gpio-tegra.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) Acked-by: Thierry Reding <treding@nvidia.com>
On 6/25/19 6:38 AM, Linus Walleij wrote: > On Mon, Jun 24, 2019 at 5:03 AM Sowjanya Komatineni > <skomatineni@nvidia.com> wrote: > >> During SC7 resume, PARKED bit clear from the pinmux registers may >> cause a glitch on the GPIO lines. >> >> So, Tegra GPIOs restore should happen prior to restoring Tegra pinmux >> to keep the GPIO lines in a known good state prior to clearing PARKED >> bit. >> >> This patch has fix for this by moving Tegra GPIOs restore to happen >> very early than pinctrl resume. >> >> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > Can this patch be applied in isolation from the other patches? > > WOuld be nice to have at least Thierry's ACK on it before I > apply it. > > Yours, > Linus Walleij Just to confirm, Will not include this in V5 as you are planning to apply this patch separately. Thanks Sowjanya
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index f57bfc07ae22..f427540568f9 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -410,7 +410,7 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc) } #ifdef CONFIG_PM_SLEEP -static int tegra_gpio_resume(struct device *dev) +static int tegra_gpio_resume_noirq(struct device *dev) { struct tegra_gpio_info *tgi = dev_get_drvdata(dev); unsigned long flags; @@ -554,7 +554,8 @@ static inline void tegra_gpio_debuginit(struct tegra_gpio_info *tgi) #endif static const struct dev_pm_ops tegra_gpio_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume) + .suspend = tegra_gpio_suspend, + .resume_noirq = tegra_gpio_resume_noirq }; static int tegra_gpio_probe(struct platform_device *pdev)
During SC7 resume, PARKED bit clear from the pinmux registers may cause a glitch on the GPIO lines. So, Tegra GPIOs restore should happen prior to restoring Tegra pinmux to keep the GPIO lines in a known good state prior to clearing PARKED bit. This patch has fix for this by moving Tegra GPIOs restore to happen very early than pinctrl resume. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- drivers/gpio/gpio-tegra.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)