From patchwork Mon Jun 24 19:28:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gary R Hook X-Patchwork-Id: 11014005 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A728112C for ; Mon, 24 Jun 2019 19:28:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2BC2628A5B for ; Mon, 24 Jun 2019 19:28:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1F90928A74; Mon, 24 Jun 2019 19:28:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B08D28A5B for ; Mon, 24 Jun 2019 19:28:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728646AbfFXT2s (ORCPT ); Mon, 24 Jun 2019 15:28:48 -0400 Received: from mail-eopbgr810041.outbound.protection.outlook.com ([40.107.81.41]:59808 "EHLO NAM01-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725881AbfFXT2s (ORCPT ); Mon, 24 Jun 2019 15:28:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=t8VVe02L1lLOvaRcjTMtjn02aIMTccv9B0YrszkRioo=; b=LDI6EDPlCukHqnH0xe1luykCnjTUx9wB1tb/FCne8SvUJbfQORMDZ48Zw1zOEO4inD+MRA66FuodTmlTKvn2sLnZwyYZd2AYHrcoqMd6a7IwjLnm/n5O0r8LZU7mak1f0o+fX5y/N1GrBtUdQ0OfiZKRowmD+z+JrcfkivXTydc= Received: from DM5PR12MB1449.namprd12.prod.outlook.com (10.172.40.14) by DM5PR12MB2358.namprd12.prod.outlook.com (52.132.141.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2008.13; Mon, 24 Jun 2019 19:28:44 +0000 Received: from DM5PR12MB1449.namprd12.prod.outlook.com ([fe80::180c:ff0c:37e6:a482]) by DM5PR12MB1449.namprd12.prod.outlook.com ([fe80::180c:ff0c:37e6:a482%10]) with mapi id 15.20.2008.014; Mon, 24 Jun 2019 19:28:44 +0000 From: "Hook, Gary" To: "linux-crypto@vger.kernel.org" CC: "Lendacky, Thomas" , "herbert@gondor.apana.org.au" , "davem@davemloft.net" Subject: [PATCH 02/11] crypto: ccp - Add a module parameter to specify a queue count Thread-Topic: [PATCH 02/11] crypto: ccp - Add a module parameter to specify a queue count Thread-Index: AQHVKsMJOIGfGw03z0Wl0jZnI/jaNw== Date: Mon, 24 Jun 2019 19:28:44 +0000 Message-ID: <156140452269.116890.16300533767199946313.stgit@sosrh3.amd.com> References: <156140365456.116890.15736288493305066708.stgit@sosrh3.amd.com> In-Reply-To: <156140365456.116890.15736288493305066708.stgit@sosrh3.amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN1PR12CA0056.namprd12.prod.outlook.com (2603:10b6:802:20::27) To DM5PR12MB1449.namprd12.prod.outlook.com (2603:10b6:4:10::14) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Gary.Hook@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [165.204.78.2] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: ded4e5ed-6e98-4a88-68fc-08d6f8da2bbc x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);SRVR:DM5PR12MB2358; x-ms-traffictypediagnostic: DM5PR12MB2358: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:483; x-forefront-prvs: 007814487B x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(396003)(136003)(39860400002)(366004)(199004)(189003)(7736002)(5660300002)(26005)(2906002)(68736007)(8936002)(305945005)(186003)(386003)(66476007)(76176011)(8676002)(6506007)(64756008)(102836004)(81156014)(53936002)(52116002)(4326008)(66556008)(6486002)(66446008)(66946007)(73956011)(316002)(5640700003)(6916009)(25786009)(6436002)(81166006)(2501003)(6512007)(3846002)(2351001)(71200400001)(71190400001)(99286004)(103116003)(54906003)(14444005)(6116002)(256004)(476003)(72206003)(66066001)(14454004)(446003)(478600001)(486006)(11346002)(86362001);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR12MB2358;H:DM5PR12MB1449.namprd12.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: WleDRCNVDMmYYrGth5gAB/mFYMSPI/UVe+exODSVNLPtWCFbg3xKojUGKN3qdHHtbOuJ8wBaPZmSDzFFmVMdz2gIRGVlMU0uGJxDWDz69+p35XJ+x9AUq6tzH6C0e6GKwp1fCLDB/ewpgkYKqKF9jaKZnhV0vQkWewrnBydmOf6sXb2IjGty1bfZWO1aXdZ9LNDniYks41VLFqekMVeRRDUOe0xZDf6DwyPnzReIul2IjGKH8sAaWw9z1096ogOTS7c9dHK1/49LVutkkfiUnXEu3XN286mBddymAyDkKzwIELZE/6d7NitlofnOb48xKwtl31tDihnHf1Npz+sm8vf2tgYnvhAt4joKNC0LP+7orQ0hTRH85FL4lhpKkthnNaFub7sSUj+qSEYIfP1KVzWGIFYbSAPN4mqf9R41tXQ= Content-ID: <0B4D21BEE45A9645804252015528D499@namprd12.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: ded4e5ed-6e98-4a88-68fc-08d6f8da2bbc X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Jun 2019 19:28:44.2953 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ghook@amd.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2358 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a module parameter to limit the number of queues per CCP. The default (nqueues=0) is to set up every available queue on each device. The count of queues starts from the first one found on the device (which is based on the device ID). Signed-off-by: Gary R Hook --- drivers/crypto/ccp/ccp-dev-v5.c | 9 ++++++++- drivers/crypto/ccp/ccp-dev.h | 15 +++++++++++++++ drivers/crypto/ccp/sp-pci.c | 15 ++++++++++++++- 3 files changed, 37 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c index a5bd11831b80..ffd546b951b6 100644 --- a/drivers/crypto/ccp/ccp-dev-v5.c +++ b/drivers/crypto/ccp/ccp-dev-v5.c @@ -14,12 +14,15 @@ #include #include #include -#include #include #include #include #include +#ifdef CONFIG_CRYPTO_DEV_CCP_DEBUGFS +#include +#endif + #include "ccp-dev.h" /* Allocate the requested number of contiguous LSB slots @@ -784,6 +787,7 @@ static irqreturn_t ccp5_irq_handler(int irq, void *data) static int ccp5_init(struct ccp_device *ccp) { + unsigned int nqueues = ccp_get_nqueues_param(); struct device *dev = ccp->dev; struct ccp_cmd_queue *cmd_q; struct dma_pool *dma_pool; @@ -856,6 +860,9 @@ static int ccp5_init(struct ccp_device *ccp) init_waitqueue_head(&cmd_q->int_queue); dev_dbg(dev, "queue #%u available\n", i); + + if (ccp->cmd_q_count >= nqueues) + break; } if (ccp->cmd_q_count == 0) { diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h index 6810b65c1939..d812446213ee 100644 --- a/drivers/crypto/ccp/ccp-dev.h +++ b/drivers/crypto/ccp/ccp-dev.h @@ -632,6 +632,8 @@ struct ccp5_desc { void ccp_add_device(struct ccp_device *ccp); void ccp_del_device(struct ccp_device *ccp); +unsigned int ccp_get_nqueues_param(void); + extern void ccp_log_error(struct ccp_device *, int); struct ccp_device *ccp_alloc_struct(struct sp_device *sp); @@ -671,4 +673,17 @@ extern const struct ccp_vdata ccpv3; extern const struct ccp_vdata ccpv5a; extern const struct ccp_vdata ccpv5b; + +#ifdef CONFIG_CRYPTO_DEV_CCP_DEBUGFS + +/* DebugFS stuff */ +typedef struct _modparam { + char *paramname; + void *param; + umode_t parammode; + } modparam_t; +extern void ccp_debugfs_register_modparams(struct dentry *parentdir); + +#endif + #endif diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index 41bce0a3f4bb..3fab79585f72 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -1,7 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 + /* * AMD Secure Processor device driver * - * Copyright (C) 2013,2018 Advanced Micro Devices, Inc. + * Copyright (C) 2013,2019 Advanced Micro Devices, Inc. * * Author: Tom Lendacky * Author: Gary R Hook @@ -27,6 +29,17 @@ #include "ccp-dev.h" #include "psp-dev.h" +/* + * Limit CCP use to a specifed number of queues per device. + */ +static unsigned int nqueues = MAX_HW_QUEUES; +module_param(nqueues, uint, 0444); +MODULE_PARM_DESC(nqueues, "Number of queues per CCP (default: 5)"); + +unsigned int ccp_get_nqueues_param(void) { + return nqueues; +} + #define MSIX_VECTORS 2 struct sp_pci {