diff mbox series

[RFC,7/7] drm/i915: Allow vdsc functions to be called without encoder.

Message ID 20190702194205.13366-8-maarten.lankhorst@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Bigjoiner atomic preparations. | expand

Commit Message

Maarten Lankhorst July 2, 2019, 7:42 p.m. UTC
This can be useful when calling the vdsc enable functions
directly without encoder.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

Navare, Manasi July 10, 2019, 10:35 p.m. UTC | #1
On Tue, Jul 02, 2019 at 09:42:05PM +0200, Maarten Lankhorst wrote:
> This can be useful when calling the vdsc enable functions
> directly without encoder.

Would this be the case on the slave pipe where we need to enable DSC but there
is no transcoder enabled for that pipe?

Manasi

> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 419a77723894..f009524ab735 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -897,7 +897,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>  		      const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	i915_reg_t dss_ctl1_reg, dss_ctl2_reg;
>  	u32 dss_ctl1_val = 0;
> @@ -910,9 +910,11 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>  	intel_display_power_get(dev_priv,
>  				intel_dsc_power_domain(crtc_state));
>  
> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> +	if (encoder) {
> +		intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
>  
> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
> +		intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
> +	}
>  
>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
>  		dss_ctl1_reg = DSS_CTL1;
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Maarten Lankhorst July 30, 2019, 9:08 a.m. UTC | #2
Op 11-07-2019 om 00:35 schreef Manasi Navare:
> On Tue, Jul 02, 2019 at 09:42:05PM +0200, Maarten Lankhorst wrote:
>> This can be useful when calling the vdsc enable functions
>> directly without encoder.
> Would this be the case on the slave pipe where we need to enable DSC but there
> is no transcoder enabled for that pipe?

Yes. :)

Although I was currently missing intel_configure_pps_for_dsc_encoder(), will be fixed in next version.

It erroneously used the encoder to check for eDP. instead of crtc_state->cpu_transcoder

~Maarten

>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +++++---
>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index 419a77723894..f009524ab735 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -897,7 +897,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>>  		      const struct intel_crtc_state *crtc_state)
>>  {
>>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>>  	enum pipe pipe = crtc->pipe;
>>  	i915_reg_t dss_ctl1_reg, dss_ctl2_reg;
>>  	u32 dss_ctl1_val = 0;
>> @@ -910,9 +910,11 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>>  	intel_display_power_get(dev_priv,
>>  				intel_dsc_power_domain(crtc_state));
>>  
>> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
>> +	if (encoder) {
>> +		intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
>>  
>> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
>> +		intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
>> +	}
>>  
>>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
>>  		dss_ctl1_reg = DSS_CTL1;
>> -- 
>> 2.20.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Navare, Manasi Aug. 21, 2019, 7:54 p.m. UTC | #3
On Tue, Jul 30, 2019 at 11:08:13AM +0200, Maarten Lankhorst wrote:
> Op 11-07-2019 om 00:35 schreef Manasi Navare:
> > On Tue, Jul 02, 2019 at 09:42:05PM +0200, Maarten Lankhorst wrote:
> >> This can be useful when calling the vdsc enable functions
> >> directly without encoder.
> > Would this be the case on the slave pipe where we need to enable DSC but there
> > is no transcoder enabled for that pipe?
> 
> Yes. :)
> 
> Although I was currently missing intel_configure_pps_for_dsc_encoder(), will be fixed in next version.
> 
> It erroneously used the encoder to check for eDP. instead of crtc_state->cpu_transcoder

Did you get a chance to update this to configure pps and write dsc pps sdp even for the slave
pipe case?
How does this behave for the dsc engine on the slave pipe? Can we skip sending the sdp in that case?

Manasi

> 
> ~Maarten
> 
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +++++---
> >>  1 file changed, 5 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> index 419a77723894..f009524ab735 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> @@ -897,7 +897,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
> >>  		      const struct intel_crtc_state *crtc_state)
> >>  {
> >>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >>  	enum pipe pipe = crtc->pipe;
> >>  	i915_reg_t dss_ctl1_reg, dss_ctl2_reg;
> >>  	u32 dss_ctl1_val = 0;
> >> @@ -910,9 +910,11 @@ void intel_dsc_enable(struct intel_encoder *encoder,
> >>  	intel_display_power_get(dev_priv,
> >>  				intel_dsc_power_domain(crtc_state));
> >>  
> >> -	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> >> +	if (encoder) {
> >> +		intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> >>  
> >> -	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
> >> +		intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
> >> +	}
> >>  
> >>  	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
> >>  		dss_ctl1_reg = DSS_CTL1;
> >> -- 
> >> 2.20.1
> >>
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 419a77723894..f009524ab735 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -897,7 +897,7 @@  void intel_dsc_enable(struct intel_encoder *encoder,
 		      const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	i915_reg_t dss_ctl1_reg, dss_ctl2_reg;
 	u32 dss_ctl1_val = 0;
@@ -910,9 +910,11 @@  void intel_dsc_enable(struct intel_encoder *encoder,
 	intel_display_power_get(dev_priv,
 				intel_dsc_power_domain(crtc_state));
 
-	intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
+	if (encoder) {
+		intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
 
-	intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
+		intel_dp_write_dsc_pps_sdp(encoder, crtc_state);
+	}
 
 	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
 		dss_ctl1_reg = DSS_CTL1;