| Message ID | 20190703072327.38165-1-jun.li@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | None | expand |
On Wed, Jul 03, 2019 at 03:23:25PM +0800, jun.li@nxp.com wrote: > From: Li Jun <jun.li@nxp.com> > > Per latest imx8mm datasheet of CCM, the parent of usb1_ctrl_root_clk > should be usb_bus. > > Signed-off-by: Li Jun <jun.li@nxp.com> I only received 3 patches as a series. In that case, the patches should have subject prefix like '[PATCH 1/3]' ... The patches look good to me. Applied all 3, thanks. Shawn > --- > drivers/clk/imx/clk-imx8mm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c > index 6b8e75d..735cf9d 100644 > --- a/drivers/clk/imx/clk-imx8mm.c > +++ b/drivers/clk/imx/clk-imx8mm.c > @@ -631,7 +631,7 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node) > clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0); > clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0); > clks[IMX8MM_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0); > - clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0); > + clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0); > clks[IMX8MM_CLK_GPU3D_ROOT] = imx_clk_gate4("gpu3d_root_clk", "gpu3d_div", base + 0x44f0, 0); > clks[IMX8MM_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0); > clks[IMX8MM_CLK_USDHC2_ROOT] = imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0); > -- > 2.7.4 >
> -----Original Message----- > From: Shawn Guo <shawnguo@kernel.org> > Sent: 2019年7月22日 11:34 > To: Jun Li <jun.li@nxp.com> > Cc: sboyd@kernel.org; robh+dt@kernel.org; mark.rutland@arm.com; > s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx > <linux-imx@nxp.com>; mturquette@baylibre.com; Peter Chen <peter.chen@nxp.com>; > Jacky Bai <ping.bai@nxp.com>; Leonard Crestez <leonard.crestez@nxp.com>; Daniel > Baluta <daniel.baluta@nxp.com>; Anson Huang <anson.huang@nxp.com>; Aisheng > Dong <aisheng.dong@nxp.com>; Peng Fan <peng.fan@nxp.com>; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linux-clk@vger.kernel.org > Subject: Re: [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus > > On Wed, Jul 03, 2019 at 03:23:25PM +0800, jun.li@nxp.com wrote: > > From: Li Jun <jun.li@nxp.com> > > > > Per latest imx8mm datasheet of CCM, the parent of usb1_ctrl_root_clk > > should be usb_bus. > > > > Signed-off-by: Li Jun <jun.li@nxp.com> > > I only received 3 patches as a series. In that case, the patches should have subject prefix > like '[PATCH 1/3]' ... Another 2 patches are for driver, so I didn't send them to you, yes, I should use the subject prefix like '[PATCH 1/3]' to avoid confusing, will pay attention this. Thanks Li Jun > > The patches look good to me. Applied all 3, thanks. > > Shawn > > > --- > > drivers/clk/imx/clk-imx8mm.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/clk/imx/clk-imx8mm.c > > b/drivers/clk/imx/clk-imx8mm.c index 6b8e75d..735cf9d 100644 > > --- a/drivers/clk/imx/clk-imx8mm.c > > +++ b/drivers/clk/imx/clk-imx8mm.c > > @@ -631,7 +631,7 @@ static int __init imx8mm_clocks_init(struct device_node > *ccm_node) > > clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", > base + 0x44a0, 0); > > clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", > base + 0x44b0, 0); > > clks[IMX8MM_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", > base + 0x44c0, 0); > > - clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", > "usb_core_ref", base + 0x44d0, 0); > > + clks[IMX8MM_CLK_USB1_CTRL_ROOT] = > > +imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0); > > clks[IMX8MM_CLK_GPU3D_ROOT] = imx_clk_gate4("gpu3d_root_clk", > "gpu3d_div", base + 0x44f0, 0); > > clks[IMX8MM_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", > "usdhc1", base + 0x4510, 0); > > clks[IMX8MM_CLK_USDHC2_ROOT] = imx_clk_gate4("usdhc2_root_clk", > > "usdhc2", base + 0x4520, 0); > > -- > > 2.7.4 > >
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 6b8e75d..735cf9d 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -631,7 +631,7 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node) clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0); clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0); clks[IMX8MM_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0); - clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0); + clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0); clks[IMX8MM_CLK_GPU3D_ROOT] = imx_clk_gate4("gpu3d_root_clk", "gpu3d_div", base + 0x44f0, 0); clks[IMX8MM_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0); clks[IMX8MM_CLK_USDHC2_ROOT] = imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0);