| Message ID | 20190706140746.29132-18-jacopo+renesas@jmondi.org (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | drm: rcar-du: Add Color Management Module (CMM) | expand |
> On July 6, 2019 at 4:07 PM Jacopo Mondi <jacopo+renesas@jmondi.org> wrote: > > > Enable/disable the CMM associated with a CRTC at crtc start and stop > time and enable the CMM unit through the Display Extensional Functions > register at group setup time. > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > --- > drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 7 +++++++ > drivers/gpu/drm/rcar-du/rcar_du_group.c | 8 ++++++++ > drivers/gpu/drm/rcar-du/rcar_du_regs.h | 5 +++++ > 3 files changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > index 23f1d6cc1719..3dac605c3a67 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > @@ -21,6 +21,7 @@ > #include <drm/drm_plane_helper.h> > #include <drm/drm_vblank.h> > > +#include "rcar_cmm.h" > #include "rcar_du_crtc.h" > #include "rcar_du_drv.h" > #include "rcar_du_encoder.h" > @@ -619,6 +620,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) > if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) > rcar_du_vsp_disable(rcrtc); > > + if (rcrtc->cmm) > + rcar_cmm_disable(rcrtc->cmm); > + > /* > * Select switch sync mode. This stops display operation and configures > * the HSYNC and VSYNC signals as inputs. > @@ -686,6 +690,9 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, > } > > rcar_du_crtc_start(rcrtc); > + > + if (rcrtc->cmm) > + rcar_cmm_enable(rcrtc->cmm); > } > > static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c > index 9eee47969e77..d252c9bb9809 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c > @@ -147,6 +147,14 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) > > rcar_du_group_setup_pins(rgrp); > > + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { > + u32 defr7 = DEFR7_CODE | > + (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0) | > + (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0); > + > + rcar_du_group_write(rgrp, DEFR7, defr7); > + } > + > if (rcdu->info->gen >= 2) { > rcar_du_group_setup_defr8(rgrp); > rcar_du_group_setup_didsr(rgrp); > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h > index bc87f080b170..fb9964949368 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h > +++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h > @@ -197,6 +197,11 @@ > #define DEFR6_MLOS1 (1 << 2) > #define DEFR6_DEFAULT (DEFR6_CODE | DEFR6_TCNE1) > > +#define DEFR7 0x000ec > +#define DEFR7_CODE (0x7779 << 16) > +#define DEFR7_CMME1 BIT(6) > +#define DEFR7_CMME0 BIT(4) > + Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> CU Uli
Hi Jacopo, Thank you for the patch. On Sat, Jul 06, 2019 at 04:07:44PM +0200, Jacopo Mondi wrote: > Enable/disable the CMM associated with a CRTC at crtc start and stop s/crtc/CRTC/ > time and enable the CMM unit through the Display Extensional Functions > register at group setup time. > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > --- > drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 7 +++++++ > drivers/gpu/drm/rcar-du/rcar_du_group.c | 8 ++++++++ > drivers/gpu/drm/rcar-du/rcar_du_regs.h | 5 +++++ > 3 files changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > index 23f1d6cc1719..3dac605c3a67 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > @@ -21,6 +21,7 @@ > #include <drm/drm_plane_helper.h> > #include <drm/drm_vblank.h> > > +#include "rcar_cmm.h" > #include "rcar_du_crtc.h" > #include "rcar_du_drv.h" > #include "rcar_du_encoder.h" > @@ -619,6 +620,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) > if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) > rcar_du_vsp_disable(rcrtc); > > + if (rcrtc->cmm) > + rcar_cmm_disable(rcrtc->cmm); > + > /* > * Select switch sync mode. This stops display operation and configures > * the HSYNC and VSYNC signals as inputs. > @@ -686,6 +690,9 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, > } > > rcar_du_crtc_start(rcrtc); > + > + if (rcrtc->cmm) > + rcar_cmm_enable(rcrtc->cmm); > } > > static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c > index 9eee47969e77..d252c9bb9809 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c > @@ -147,6 +147,14 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) > > rcar_du_group_setup_pins(rgrp); > > + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { > + u32 defr7 = DEFR7_CODE | > + (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0) | > + (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0); Nitpicking, the DU driver usually puts the | at the beginning of the next line for such assignments. u32 defr7 = DEFR7_CODE | (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0) | (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0); Apart from that, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + > + rcar_du_group_write(rgrp, DEFR7, defr7); > + } > + > if (rcdu->info->gen >= 2) { > rcar_du_group_setup_defr8(rgrp); > rcar_du_group_setup_didsr(rgrp); > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h > index bc87f080b170..fb9964949368 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h > +++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h > @@ -197,6 +197,11 @@ > #define DEFR6_MLOS1 (1 << 2) > #define DEFR6_DEFAULT (DEFR6_CODE | DEFR6_TCNE1) > > +#define DEFR7 0x000ec > +#define DEFR7_CODE (0x7779 << 16) > +#define DEFR7_CMME1 BIT(6) > +#define DEFR7_CMME0 BIT(4) > + > /* ----------------------------------------------------------------------------- > * R8A7790-only Control Registers > */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 23f1d6cc1719..3dac605c3a67 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -21,6 +21,7 @@ #include <drm/drm_plane_helper.h> #include <drm/drm_vblank.h> +#include "rcar_cmm.h" #include "rcar_du_crtc.h" #include "rcar_du_drv.h" #include "rcar_du_encoder.h" @@ -619,6 +620,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) rcar_du_vsp_disable(rcrtc); + if (rcrtc->cmm) + rcar_cmm_disable(rcrtc->cmm); + /* * Select switch sync mode. This stops display operation and configures * the HSYNC and VSYNC signals as inputs. @@ -686,6 +690,9 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, } rcar_du_crtc_start(rcrtc); + + if (rcrtc->cmm) + rcar_cmm_enable(rcrtc->cmm); } static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c index 9eee47969e77..d252c9bb9809 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c @@ -147,6 +147,14 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) rcar_du_group_setup_pins(rgrp); + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { + u32 defr7 = DEFR7_CODE | + (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0) | + (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0); + + rcar_du_group_write(rgrp, DEFR7, defr7); + } + if (rcdu->info->gen >= 2) { rcar_du_group_setup_defr8(rgrp); rcar_du_group_setup_didsr(rgrp); diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h index bc87f080b170..fb9964949368 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h @@ -197,6 +197,11 @@ #define DEFR6_MLOS1 (1 << 2) #define DEFR6_DEFAULT (DEFR6_CODE | DEFR6_TCNE1) +#define DEFR7 0x000ec +#define DEFR7_CODE (0x7779 << 16) +#define DEFR7_CMME1 BIT(6) +#define DEFR7_CMME0 BIT(4) + /* ----------------------------------------------------------------------------- * R8A7790-only Control Registers */
Enable/disable the CMM associated with a CRTC at crtc start and stop time and enable the CMM unit through the Display Extensional Functions register at group setup time. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 7 +++++++ drivers/gpu/drm/rcar-du/rcar_du_group.c | 8 ++++++++ drivers/gpu/drm/rcar-du/rcar_du_regs.h | 5 +++++ 3 files changed, 20 insertions(+)