Message ID | 20190709214735.16907-2-manasi.d.navare@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] drm/i915/display/tgl: Bump up the mode vertical limits to support 8K | expand |
On Tue, 2019-07-09 at 14:47 -0700, Manasi Navare wrote: > On TGL+, the plane height for 8K planes can be 4320, so bump it up > To support 4320, we need to increase the number of bits used to > read plane_height to 13 as opposed to older 12 bits. > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 21 > ++++++++++++++++++-- > 1 file changed, 19 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 0d5c8af01f54..be9a54cb5ecc 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct > drm_framebuffer *fb, > return 5120; > } > > +static int skl_max_plane_height(void) > +{ > + return 4096; > +} > + > +static int tgl_max_plane_height(void) > +{ > + return 4320; > +} > + > static bool skl_check_main_ccs_coordinates(struct intel_plane_state > *plane_state, > int main_x, int main_y, u32 > main_offset) > { > @@ -3391,9 +3401,13 @@ static int skl_check_main_surface(struct > intel_plane_state *plane_state) > int w = drm_rect_width(&plane_state->base.src) >> 16; > int h = drm_rect_height(&plane_state->base.src) >> 16; > int max_width; > - int max_height = 4096; > + int max_height; > u32 alignment, offset, aux_offset = plane_state- > >color_plane[1].offset; > > + if (INTEL_GEN(dev_priv) >= 12) > + max_height = tgl_max_plane_height(); > + else > + max_height = skl_max_plane_height(); Give a line between max_width block, also I would move the height after the width. > if (INTEL_GEN(dev_priv) >= 11) > max_width = icl_max_plane_width(fb, 0, rotation); > else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > @@ -9865,7 +9879,10 @@ skylake_get_initial_plane_config(struct > intel_crtc *crtc, > offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); > > val = I915_READ(PLANE_SIZE(pipe, plane_id)); > - fb->height = ((val >> 16) & 0xfff) + 1; > + if (INTEL_GEN(dev_priv) >= 12) > + fb->height = ((val >> 16) & 0x1fff) + 1; > + else > + fb->height = ((val >> 16) & 0xfff) + 1; > fb->width = ((val >> 0) & 0x1fff) + 1; > > val = I915_READ(PLANE_STRIDE(pipe, plane_id));
On Tue, Jul 09, 2019 at 04:07:23PM -0700, Souza, Jose wrote: > On Tue, 2019-07-09 at 14:47 -0700, Manasi Navare wrote: > > On TGL+, the plane height for 8K planes can be 4320, so bump it up > > To support 4320, we need to increase the number of bits used to > > read plane_height to 13 as opposed to older 12 bits. > > > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 21 > > ++++++++++++++++++-- > > 1 file changed, 19 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > > b/drivers/gpu/drm/i915/display/intel_display.c > > index 0d5c8af01f54..be9a54cb5ecc 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct > > drm_framebuffer *fb, > > return 5120; > > } > > > > +static int skl_max_plane_height(void) > > +{ > > + return 4096; > > +} > > + > > +static int tgl_max_plane_height(void) > > +{ > > + return 4320; > > +} > > + > > static bool skl_check_main_ccs_coordinates(struct intel_plane_state > > *plane_state, > > int main_x, int main_y, u32 > > main_offset) > > { > > @@ -3391,9 +3401,13 @@ static int skl_check_main_surface(struct > > intel_plane_state *plane_state) > > int w = drm_rect_width(&plane_state->base.src) >> 16; > > int h = drm_rect_height(&plane_state->base.src) >> 16; > > int max_width; > > - int max_height = 4096; > > + int max_height; > > u32 alignment, offset, aux_offset = plane_state- > > >color_plane[1].offset; > > > > + if (INTEL_GEN(dev_priv) >= 12) > > + max_height = tgl_max_plane_height(); > > + else > > + max_height = skl_max_plane_height(); > > Give a line between max_width block, also I would move the height after > the width. Ok, will make this change, can I add your r-b with this change? Manasi > > > if (INTEL_GEN(dev_priv) >= 11) > > max_width = icl_max_plane_width(fb, 0, rotation); > > else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > > @@ -9865,7 +9879,10 @@ skylake_get_initial_plane_config(struct > > intel_crtc *crtc, > > offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); > > > > val = I915_READ(PLANE_SIZE(pipe, plane_id)); > > - fb->height = ((val >> 16) & 0xfff) + 1; > > + if (INTEL_GEN(dev_priv) >= 12) > > + fb->height = ((val >> 16) & 0x1fff) + 1; > > + else > > + fb->height = ((val >> 16) & 0xfff) + 1; > > fb->width = ((val >> 0) & 0x1fff) + 1; > > > > val = I915_READ(PLANE_STRIDE(pipe, plane_id));
On Tue, Jul 09, 2019 at 02:47:35PM -0700, Manasi Navare wrote: > On TGL+, the plane height for 8K planes can be 4320, so bump it up > To support 4320, we need to increase the number of bits used to > read plane_height to 13 as opposed to older 12 bits. > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 21 ++++++++++++++++++-- > 1 file changed, 19 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 0d5c8af01f54..be9a54cb5ecc 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, > return 5120; > } > > +static int skl_max_plane_height(void) > +{ > + return 4096; > +} > + > +static int tgl_max_plane_height(void) > +{ > + return 4320; icl has this limit already. > +} > + > static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, > int main_x, int main_y, u32 main_offset) > { > @@ -3391,9 +3401,13 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) > int w = drm_rect_width(&plane_state->base.src) >> 16; > int h = drm_rect_height(&plane_state->base.src) >> 16; > int max_width; > - int max_height = 4096; > + int max_height; > u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; > > + if (INTEL_GEN(dev_priv) >= 12) > + max_height = tgl_max_plane_height(); > + else > + max_height = skl_max_plane_height(); > if (INTEL_GEN(dev_priv) >= 11) > max_width = icl_max_plane_width(fb, 0, rotation); > else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > @@ -9865,7 +9879,10 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, > offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); > > val = I915_READ(PLANE_SIZE(pipe, plane_id)); > - fb->height = ((val >> 16) & 0xfff) + 1; > + if (INTEL_GEN(dev_priv) >= 12) > + fb->height = ((val >> 16) & 0x1fff) + 1; > + else > + fb->height = ((val >> 16) & 0xfff) + 1; > fb->width = ((val >> 0) & 0x1fff) + 1; > > val = I915_READ(PLANE_STRIDE(pipe, plane_id)); > -- > 2.19.1
On Wed, Jul 10, 2019 at 10:18:38PM +0300, Ville Syrjälä wrote: > On Tue, Jul 09, 2019 at 02:47:35PM -0700, Manasi Navare wrote: > > On TGL+, the plane height for 8K planes can be 4320, so bump it up > > To support 4320, we need to increase the number of bits used to > > read plane_height to 13 as opposed to older 12 bits. > > > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 21 ++++++++++++++++++-- > > 1 file changed, 19 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > index 0d5c8af01f54..be9a54cb5ecc 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, > > return 5120; > > } > > > > +static int skl_max_plane_height(void) > > +{ > > + return 4096; > > +} > > + > > +static int tgl_max_plane_height(void) > > +{ > > + return 4320; Yes icl does but we start supporting 8K from tgl, should this be changed to icl_max_plane_height() and return 4320? Manasi > > icl has this limit already. > > > +} > > + > > static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, > > int main_x, int main_y, u32 main_offset) > > { > > @@ -3391,9 +3401,13 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) > > int w = drm_rect_width(&plane_state->base.src) >> 16; > > int h = drm_rect_height(&plane_state->base.src) >> 16; > > int max_width; > > - int max_height = 4096; > > + int max_height; > > u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; > > > > + if (INTEL_GEN(dev_priv) >= 12) > > + max_height = tgl_max_plane_height(); > > + else > > + max_height = skl_max_plane_height(); > > if (INTEL_GEN(dev_priv) >= 11) > > max_width = icl_max_plane_width(fb, 0, rotation); > > else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > > @@ -9865,7 +9879,10 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, > > offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); > > > > val = I915_READ(PLANE_SIZE(pipe, plane_id)); > > - fb->height = ((val >> 16) & 0xfff) + 1; > > + if (INTEL_GEN(dev_priv) >= 12) > > + fb->height = ((val >> 16) & 0x1fff) + 1; > > + else > > + fb->height = ((val >> 16) & 0xfff) + 1; > > fb->width = ((val >> 0) & 0x1fff) + 1; > > > > val = I915_READ(PLANE_STRIDE(pipe, plane_id)); > > -- > > 2.19.1 > > -- > Ville Syrjälä > Intel
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 0d5c8af01f54..be9a54cb5ecc 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, return 5120; } +static int skl_max_plane_height(void) +{ + return 4096; +} + +static int tgl_max_plane_height(void) +{ + return 4320; +} + static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, int main_x, int main_y, u32 main_offset) { @@ -3391,9 +3401,13 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) int w = drm_rect_width(&plane_state->base.src) >> 16; int h = drm_rect_height(&plane_state->base.src) >> 16; int max_width; - int max_height = 4096; + int max_height; u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; + if (INTEL_GEN(dev_priv) >= 12) + max_height = tgl_max_plane_height(); + else + max_height = skl_max_plane_height(); if (INTEL_GEN(dev_priv) >= 11) max_width = icl_max_plane_width(fb, 0, rotation); else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) @@ -9865,7 +9879,10 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); val = I915_READ(PLANE_SIZE(pipe, plane_id)); - fb->height = ((val >> 16) & 0xfff) + 1; + if (INTEL_GEN(dev_priv) >= 12) + fb->height = ((val >> 16) & 0x1fff) + 1; + else + fb->height = ((val >> 16) & 0xfff) + 1; fb->width = ((val >> 0) & 0x1fff) + 1; val = I915_READ(PLANE_STRIDE(pipe, plane_id));
On TGL+, the plane height for 8K planes can be 4320, so bump it up To support 4320, we need to increase the number of bits used to read plane_height to 13 as opposed to older 12 bits. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 21 ++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-)