[12/12] drm/i915/uc: kill <g,h>uc_to_i915
diff mbox series

Message ID 20190710005437.3496-13-daniele.ceraolospurio@intel.com
State New
Headers show
Series
  • GT-fy the uc code
Related show

Commit Message

Daniele Ceraolo Spurio July 10, 2019, 12:54 a.m. UTC
Get rid of them to avoid more users being added while the guc code
transitions to use gt more than i915.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c     |  8 ++++----
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c |  3 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c  |  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 13 +++++++------
 drivers/gpu/drm/i915/gt/uc/intel_huc.c     |  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c  |  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c      |  4 ++--
 drivers/gpu/drm/i915/i915_drv.h            | 10 ----------
 8 files changed, 18 insertions(+), 26 deletions(-)

Comments

Michal Wajdeczko July 10, 2019, 6:37 p.m. UTC | #1
On Wed, 10 Jul 2019 02:54:37 +0200, Daniele Ceraolo Spurio  
<daniele.ceraolospurio@intel.com> wrote:

> Get rid of them to avoid more users being added while the guc code
> transitions to use gt more than i915.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---

Acked-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

>  drivers/gpu/drm/i915/gt/uc/intel_guc.c     |  8 ++++----
>  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c |  3 ++-
>  drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c  |  2 +-
>  drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 13 +++++++------
>  drivers/gpu/drm/i915/gt/uc/intel_huc.c     |  2 +-
>  drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c  |  2 +-
>  drivers/gpu/drm/i915/gt/uc/intel_uc.c      |  4 ++--
>  drivers/gpu/drm/i915/i915_drv.h            | 10 ----------
>  8 files changed, 18 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 6b56f39072b1..83f2c197375f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -77,7 +77,7 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
> void intel_guc_init_early(struct intel_guc *guc)
>  {
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> +	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> 	intel_guc_fw_init_early(guc);
>  	intel_guc_ct_init_early(&guc->ct);
> @@ -204,7 +204,7 @@ static u32 guc_ctl_feature_flags(struct intel_guc  
> *guc)
>  {
>  	u32 flags = 0;
> -	if (!USES_GUC_SUBMISSION(guc_to_i915(guc)))
> +	if (!intel_uc_is_using_guc_submission(&guc_to_gt(guc)->uc))
>  		flags |= GUC_CTL_DISABLE_SCHEDULER;
> 	return flags;
> @@ -214,7 +214,7 @@ static u32 guc_ctl_ctxinfo_flags(struct intel_guc  
> *guc)
>  {
>  	u32 flags = 0;
> -	if (USES_GUC_SUBMISSION(guc_to_i915(guc))) {
> +	if (intel_uc_is_using_guc_submission(&guc_to_gt(guc)->uc)) {
>  		u32 ctxnum, base;
> 		base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
> @@ -414,7 +414,7 @@ int intel_guc_to_host_process_recv_msg(struct  
> intel_guc *guc,
> int intel_guc_sample_forcewake(struct intel_guc *guc)
>  {
> -	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
>  	u32 action[2];
> 	action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 69859d1e047f..a0da80241f22 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -22,6 +22,7 @@
>   *
>   */
> +#include "gt/intel_gt.h"
>  #include "intel_guc_ads.h"
>  #include "intel_uc.h"
>  #include "i915_drv.h"
> @@ -85,7 +86,7 @@ struct __guc_ads_blob {
> static void __guc_ads_init(struct intel_guc *guc)
>  {
> -	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
>  	struct __guc_ads_blob *blob = guc->ads_blob;
>  	const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE +  
> LR_HW_CONTEXT_SIZE;
>  	u32 base;
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> index 98305e3fd42c..3dfa40fdbe99 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> @@ -76,7 +76,7 @@ MODULE_FIRMWARE(ICL_GUC_FIRMWARE_PATH);
>  static void guc_fw_select(struct intel_uc_fw *guc_fw)
>  {
>  	struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> +	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> 	GEM_BUG_ON(guc_fw->type != INTEL_UC_FW_TYPE_GUC);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> index 0355724ee997..52f814704d8e 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> @@ -24,6 +24,7 @@
> #include <linux/debugfs.h>
> +#include "gt/intel_gt.h"
>  #include "intel_guc_log.h"
>  #include "i915_drv.h"
> @@ -215,7 +216,7 @@ static bool guc_check_log_buf_overflow(struct  
> intel_guc_log *log,
>  			log->stats[type].sampled_overflow += 16;
>  		}
> -		dev_notice_ratelimited(guc_to_i915(log_to_guc(log))->drm.dev,
> +		dev_notice_ratelimited(guc_to_gt(log_to_guc(log))->i915->drm.dev,
>  				       "GuC log buffer overflow\n");
>  	}
> @@ -389,7 +390,7 @@ void intel_guc_log_init_early(struct intel_guc_log  
> *log)
>  static int guc_log_relay_create(struct intel_guc_log *log)
>  {
>  	struct intel_guc *guc = log_to_guc(log);
> -	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
>  	struct rchan *guc_log_relay_chan;
>  	size_t n_subbufs, subbuf_size;
>  	int ret;
> @@ -435,7 +436,7 @@ static void guc_log_relay_destroy(struct  
> intel_guc_log *log)
>  static void guc_log_capture_logs(struct intel_guc_log *log)
>  {
>  	struct intel_guc *guc = log_to_guc(log);
> -	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
>  	intel_wakeref_t wakeref;
> 	guc_read_update_log_buffer(log);
> @@ -504,7 +505,7 @@ void intel_guc_log_destroy(struct intel_guc_log *log)
>  int intel_guc_log_set_level(struct intel_guc_log *log, u32 level)
>  {
>  	struct intel_guc *guc = log_to_guc(log);
> -	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
>  	intel_wakeref_t wakeref;
>  	int ret = 0;
> @@ -621,7 +622,7 @@ int intel_guc_log_relay_open(struct intel_guc_log  
> *log)
>  void intel_guc_log_relay_flush(struct intel_guc_log *log)
>  {
>  	struct intel_guc *guc = log_to_guc(log);
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> +	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>  	intel_wakeref_t wakeref;
> 	/*
> @@ -640,7 +641,7 @@ void intel_guc_log_relay_flush(struct intel_guc_log  
> *log)
>  void intel_guc_log_relay_close(struct intel_guc_log *log)
>  {
>  	struct intel_guc *guc = log_to_guc(log);
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> +	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> 	guc_log_disable_flush_events(log);
>  	intel_synchronize_irq(i915);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> index 99f0fa2e8ff5..bc14439173d7 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> @@ -30,7 +30,7 @@
> void intel_huc_init_early(struct intel_huc *huc)
>  {
> -	struct drm_i915_private *i915 = huc_to_i915(huc);
> +	struct drm_i915_private *i915 = huc_to_gt(huc)->i915;
> 	intel_huc_fw_init_early(huc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> index becfd34a26c1..543854c42d9d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> @@ -70,7 +70,7 @@ MODULE_FIRMWARE(I915_ICL_HUC_UCODE);
>  static void huc_fw_select(struct intel_uc_fw *huc_fw)
>  {
>  	struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
> -	struct drm_i915_private *dev_priv = huc_to_i915(huc);
> +	struct drm_i915_private *dev_priv = huc_to_gt(huc)->i915;
> 	GEM_BUG_ON(huc_fw->type != INTEL_UC_FW_TYPE_HUC);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c  
> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 3fead2dc9d32..be0f8deba2cb 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -248,7 +248,7 @@ static void guc_get_mmio_msg(struct intel_guc *guc)
> static void guc_handle_mmio_msg(struct intel_guc *guc)
>  {
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> +	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
> 	/* we need communication to be enabled to reply to GuC */
>  	GEM_BUG_ON(guc->handler == intel_guc_to_host_event_handler_nop);
> @@ -280,7 +280,7 @@ static void guc_disable_interrupts(struct intel_guc  
> *guc)
> static int guc_enable_communication(struct intel_guc *guc)
>  {
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> +	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>  	int ret;
> 	ret = intel_guc_ct_enable(&guc->ct);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h  
> b/drivers/gpu/drm/i915/i915_drv.h
> index 2ace1ad173ad..1dbc4f5c8661 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1901,16 +1901,6 @@ static inline struct drm_i915_private  
> *wopcm_to_i915(struct intel_wopcm *wopcm)
>  	return container_of(wopcm, struct drm_i915_private, wopcm);
>  }
> -static inline struct drm_i915_private *guc_to_i915(struct intel_guc  
> *guc)
> -{
> -	return container_of(guc, struct drm_i915_private, gt.uc.guc);
> -}
> -
> -static inline struct drm_i915_private *huc_to_i915(struct intel_huc  
> *huc)
> -{
> -	return container_of(huc, struct drm_i915_private, gt.uc.huc);
> -}
> -
>  /* Simple iterator over all initialised engines */
>  #define for_each_engine(engine__, dev_priv__, id__) \
>  	for ((id__) = 0; \

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 6b56f39072b1..83f2c197375f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -77,7 +77,7 @@  void intel_guc_init_send_regs(struct intel_guc *guc)
 
 void intel_guc_init_early(struct intel_guc *guc)
 {
-	struct drm_i915_private *i915 = guc_to_i915(guc);
+	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 
 	intel_guc_fw_init_early(guc);
 	intel_guc_ct_init_early(&guc->ct);
@@ -204,7 +204,7 @@  static u32 guc_ctl_feature_flags(struct intel_guc *guc)
 {
 	u32 flags = 0;
 
-	if (!USES_GUC_SUBMISSION(guc_to_i915(guc)))
+	if (!intel_uc_is_using_guc_submission(&guc_to_gt(guc)->uc))
 		flags |= GUC_CTL_DISABLE_SCHEDULER;
 
 	return flags;
@@ -214,7 +214,7 @@  static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
 {
 	u32 flags = 0;
 
-	if (USES_GUC_SUBMISSION(guc_to_i915(guc))) {
+	if (intel_uc_is_using_guc_submission(&guc_to_gt(guc)->uc)) {
 		u32 ctxnum, base;
 
 		base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
@@ -414,7 +414,7 @@  int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
 
 int intel_guc_sample_forcewake(struct intel_guc *guc)
 {
-	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
 	u32 action[2];
 
 	action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 69859d1e047f..a0da80241f22 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -22,6 +22,7 @@ 
  *
  */
 
+#include "gt/intel_gt.h"
 #include "intel_guc_ads.h"
 #include "intel_uc.h"
 #include "i915_drv.h"
@@ -85,7 +86,7 @@  struct __guc_ads_blob {
 
 static void __guc_ads_init(struct intel_guc *guc)
 {
-	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
 	struct __guc_ads_blob *blob = guc->ads_blob;
 	const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
 	u32 base;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 98305e3fd42c..3dfa40fdbe99 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -76,7 +76,7 @@  MODULE_FIRMWARE(ICL_GUC_FIRMWARE_PATH);
 static void guc_fw_select(struct intel_uc_fw *guc_fw)
 {
 	struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
-	struct drm_i915_private *i915 = guc_to_i915(guc);
+	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 
 	GEM_BUG_ON(guc_fw->type != INTEL_UC_FW_TYPE_GUC);
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 0355724ee997..52f814704d8e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -24,6 +24,7 @@ 
 
 #include <linux/debugfs.h>
 
+#include "gt/intel_gt.h"
 #include "intel_guc_log.h"
 #include "i915_drv.h"
 
@@ -215,7 +216,7 @@  static bool guc_check_log_buf_overflow(struct intel_guc_log *log,
 			log->stats[type].sampled_overflow += 16;
 		}
 
-		dev_notice_ratelimited(guc_to_i915(log_to_guc(log))->drm.dev,
+		dev_notice_ratelimited(guc_to_gt(log_to_guc(log))->i915->drm.dev,
 				       "GuC log buffer overflow\n");
 	}
 
@@ -389,7 +390,7 @@  void intel_guc_log_init_early(struct intel_guc_log *log)
 static int guc_log_relay_create(struct intel_guc_log *log)
 {
 	struct intel_guc *guc = log_to_guc(log);
-	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
 	struct rchan *guc_log_relay_chan;
 	size_t n_subbufs, subbuf_size;
 	int ret;
@@ -435,7 +436,7 @@  static void guc_log_relay_destroy(struct intel_guc_log *log)
 static void guc_log_capture_logs(struct intel_guc_log *log)
 {
 	struct intel_guc *guc = log_to_guc(log);
-	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
 	intel_wakeref_t wakeref;
 
 	guc_read_update_log_buffer(log);
@@ -504,7 +505,7 @@  void intel_guc_log_destroy(struct intel_guc_log *log)
 int intel_guc_log_set_level(struct intel_guc_log *log, u32 level)
 {
 	struct intel_guc *guc = log_to_guc(log);
-	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+	struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915;
 	intel_wakeref_t wakeref;
 	int ret = 0;
 
@@ -621,7 +622,7 @@  int intel_guc_log_relay_open(struct intel_guc_log *log)
 void intel_guc_log_relay_flush(struct intel_guc_log *log)
 {
 	struct intel_guc *guc = log_to_guc(log);
-	struct drm_i915_private *i915 = guc_to_i915(guc);
+	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 	intel_wakeref_t wakeref;
 
 	/*
@@ -640,7 +641,7 @@  void intel_guc_log_relay_flush(struct intel_guc_log *log)
 void intel_guc_log_relay_close(struct intel_guc_log *log)
 {
 	struct intel_guc *guc = log_to_guc(log);
-	struct drm_i915_private *i915 = guc_to_i915(guc);
+	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 
 	guc_log_disable_flush_events(log);
 	intel_synchronize_irq(i915);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index 99f0fa2e8ff5..bc14439173d7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -30,7 +30,7 @@ 
 
 void intel_huc_init_early(struct intel_huc *huc)
 {
-	struct drm_i915_private *i915 = huc_to_i915(huc);
+	struct drm_i915_private *i915 = huc_to_gt(huc)->i915;
 
 	intel_huc_fw_init_early(huc);
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
index becfd34a26c1..543854c42d9d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
@@ -70,7 +70,7 @@  MODULE_FIRMWARE(I915_ICL_HUC_UCODE);
 static void huc_fw_select(struct intel_uc_fw *huc_fw)
 {
 	struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
-	struct drm_i915_private *dev_priv = huc_to_i915(huc);
+	struct drm_i915_private *dev_priv = huc_to_gt(huc)->i915;
 
 	GEM_BUG_ON(huc_fw->type != INTEL_UC_FW_TYPE_HUC);
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 3fead2dc9d32..be0f8deba2cb 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -248,7 +248,7 @@  static void guc_get_mmio_msg(struct intel_guc *guc)
 
 static void guc_handle_mmio_msg(struct intel_guc *guc)
 {
-	struct drm_i915_private *i915 = guc_to_i915(guc);
+	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 
 	/* we need communication to be enabled to reply to GuC */
 	GEM_BUG_ON(guc->handler == intel_guc_to_host_event_handler_nop);
@@ -280,7 +280,7 @@  static void guc_disable_interrupts(struct intel_guc *guc)
 
 static int guc_enable_communication(struct intel_guc *guc)
 {
-	struct drm_i915_private *i915 = guc_to_i915(guc);
+	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 	int ret;
 
 	ret = intel_guc_ct_enable(&guc->ct);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ace1ad173ad..1dbc4f5c8661 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1901,16 +1901,6 @@  static inline struct drm_i915_private *wopcm_to_i915(struct intel_wopcm *wopcm)
 	return container_of(wopcm, struct drm_i915_private, wopcm);
 }
 
-static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc)
-{
-	return container_of(guc, struct drm_i915_private, gt.uc.guc);
-}
-
-static inline struct drm_i915_private *huc_to_i915(struct intel_huc *huc)
-{
-	return container_of(huc, struct drm_i915_private, gt.uc.huc);
-}
-
 /* Simple iterator over all initialised engines */
 #define for_each_engine(engine__, dev_priv__, id__) \
 	for ((id__) = 0; \