| Message ID | 20190710125851.3275-1-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Don't overestimate 4:2:0 link symbol clock | expand |
On Wed, 2019-07-10 at 15:58 +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > With 4:2:0 output the LS clock can be half of what it is with 4:4:4. > Make that happen. > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 0bdb7ecc5a81..1dfacf090fb8 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1853,8 +1853,10 @@ intel_dp_compute_link_config_wide(struct > intel_dp *intel_dp, > int mode_rate, link_clock, link_avail; > > for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * > 3) { > + int output_bpp = intel_dp_output_bpp(pipe_config, bpp); > + > mode_rate = intel_dp_link_required(adjusted_mode- > >crtc_clock, > - bpp); > + output_bpp); > > for (clock = limits->min_clock; clock <= limits- > >max_clock; clock++) { > for (lane_count = limits->min_lane_count; According to DP 1.4 spec section 1.7.1 [Makeup of the Main-Link], previous implementation worked by below explaination. After the stream data is packed and mapped to the Main-Link, the packed stream data rate shall be less than or equal to the Main-Link’s link symbol rate. When the packed stream data rate is less than the Main- Link’s link symbol rate, stuffing symbols are inserted. Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
On Thu, Jul 11, 2019 at 04:49:06PM +0000, Mun, Gwan-gyeong wrote: > On Wed, 2019-07-10 at 15:58 +0300, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > With 4:2:0 output the LS clock can be half of what it is with 4:4:4. > > Make that happen. > > > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > > b/drivers/gpu/drm/i915/display/intel_dp.c > > index 0bdb7ecc5a81..1dfacf090fb8 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > > @@ -1853,8 +1853,10 @@ intel_dp_compute_link_config_wide(struct > > intel_dp *intel_dp, > > int mode_rate, link_clock, link_avail; > > > > for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * > > 3) { > > + int output_bpp = intel_dp_output_bpp(pipe_config, bpp); > > + > > mode_rate = intel_dp_link_required(adjusted_mode- > > >crtc_clock, > > - bpp); > > + output_bpp); > > > > for (clock = limits->min_clock; clock <= limits- > > >max_clock; clock++) { > > for (lane_count = limits->min_lane_count; > According to DP 1.4 spec section 1.7.1 [Makeup of the Main-Link], > previous implementation worked by below explaination. > After the stream data is packed and mapped to the Main-Link, the packed > stream data rate shall be less than or equal to the Main-Link’s link > symbol rate. When the packed stream data rate is less than the Main- > Link’s link symbol rate, stuffing symbols are inserted. > > Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Nice. Thanks for double checking. Pushed to dinq.
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0bdb7ecc5a81..1dfacf090fb8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1853,8 +1853,10 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, int mode_rate, link_clock, link_avail; for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) { + int output_bpp = intel_dp_output_bpp(pipe_config, bpp); + mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, - bpp); + output_bpp); for (clock = limits->min_clock; clock <= limits->max_clock; clock++) { for (lane_count = limits->min_lane_count;