| Message ID | 20190711160114.634-7-andrew.murray@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | coresight: etm4x: save/restore ETMv4 context across CPU low power states | expand |
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index 8a88ddebc1a2..e0dc0a93312f 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -90,6 +90,9 @@ its hardware characteristcs. * cpu: the cpu phandle this ETM/PTM is affined to. When omitted the source is considered to belong to CPU0. + * arm,coresight-needs-save-restore: boolean. Indicates that software + should save/restore state across power down. + * Optional property for TMC: * arm,buffer-size: size of contiguous buffer space for TMC ETR
Some coresight components, because of choices made during hardware integration, require their state to be saved and restored across CPU low power states. The software has no reliable method of detecting when save/restore is required thus let's add a binding to inform the kernel. Signed-off-by: Andrew Murray <andrew.murray@arm.com> --- Documentation/devicetree/bindings/arm/coresight.txt | 3 +++ 1 file changed, 3 insertions(+)