| Message ID | 20190711192512.31936-1-mst@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | xio3130_downstream: typo fix | expand |
On 7/11/19 10:25 PM, Michael S. Tsirkin wrote: > slt ctl/status are passed in incorrect order. > Fix this up. > > Signed-off-by: Michael S. Tsirkin <mst@redhat.com> > Reported-by: Peter Maydell <peter.maydell@linaro.org> > --- > hw/pci-bridge/xio3130_downstream.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c > index 899b0fd6c9..182e164f74 100644 > --- a/hw/pci-bridge/xio3130_downstream.c > +++ b/hw/pci-bridge/xio3130_downstream.c > @@ -43,7 +43,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, > { > uint16_t slt_ctl, slt_sta; > > - pcie_cap_slot_get(d, &slt_sta, &slt_ctl); > + pcie_cap_slot_get(d, &slt_ctl, &slt_sta); > pci_bridge_write_config(d, address, val, len); > pcie_cap_flr_write_config(d, address, val, len); > pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len); Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Thanks, Marcel
On 7/11/19 9:25 PM, Michael S. Tsirkin wrote: > slt ctl/status are passed in incorrect order. > Fix this up. > Fixes: Coverity (CID 1403007) > Signed-off-by: Michael S. Tsirkin <mst@redhat.com> > Reported-by: Peter Maydell <peter.maydell@linaro.org> > --- > hw/pci-bridge/xio3130_downstream.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c > index 899b0fd6c9..182e164f74 100644 > --- a/hw/pci-bridge/xio3130_downstream.c > +++ b/hw/pci-bridge/xio3130_downstream.c > @@ -43,7 +43,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, > { > uint16_t slt_ctl, slt_sta; > > - pcie_cap_slot_get(d, &slt_sta, &slt_ctl); > + pcie_cap_slot_get(d, &slt_ctl, &slt_sta); > pci_bridge_write_config(d, address, val, len); > pcie_cap_flr_write_config(d, address, val, len); > pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len); >
diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 899b0fd6c9..182e164f74 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -43,7 +43,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, { uint16_t slt_ctl, slt_sta; - pcie_cap_slot_get(d, &slt_sta, &slt_ctl); + pcie_cap_slot_get(d, &slt_ctl, &slt_sta); pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len);
slt ctl/status are passed in incorrect order. Fix this up. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reported-by: Peter Maydell <peter.maydell@linaro.org> --- hw/pci-bridge/xio3130_downstream.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)