| Message ID | 20190712202214.3906-2-manasi.d.navare@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits | expand |
On Fri, Jul 12, 2019 at 01:22:14PM -0700, Manasi Navare wrote: > On ICL+, the max supported plane height is 4320, so bump it up > To support 4320, we need to increase the number of bits used to > read plane_height to 13 as opposed to older 12 bits. > > v3: > * Use 0xffff for mask as extra bits are mbz (Ville) > v2: > * ICL plane height supported is 4320 (Ville) > * Add a new line between max width and max height (Jose) > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++-- > 1 file changed, 17 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 15006764862b..5103504bbbec 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, > return 5120; > } > > +static int skl_max_plane_height(void) > +{ > + return 4096; > +} > + > +static int icl_max_plane_height(void) > +{ > + return 4320; > +} > + > static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, > int main_x, int main_y, u32 main_offset) > { > @@ -3391,7 +3401,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) > int w = drm_rect_width(&plane_state->base.src) >> 16; > int h = drm_rect_height(&plane_state->base.src) >> 16; > int max_width; > - int max_height = 4096; > + int max_height; > u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; > > if (INTEL_GEN(dev_priv) >= 11) > @@ -3401,6 +3411,11 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) > else > max_width = skl_max_plane_width(fb, 0, rotation); > > + if (INTEL_GEN(dev_priv) >= 11) > + max_height = icl_max_plane_height(); > + else > + max_height = skl_max_plane_height(); > + > if (w > max_width || h > max_height) { > DRM_DEBUG_KMS("requested Y/RGB source size %dx%d too big (limit %dx%d)\n", > w, h, max_width, max_height); > @@ -9865,7 +9880,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, > offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); > > val = I915_READ(PLANE_SIZE(pipe, plane_id)); > - fb->height = ((val >> 16) & 0xfff) + 1; > + fb->height = ((val >> 16) & 0xffff) + 1; > fb->width = ((val >> 0) & 0x1fff) + 1; I would adjust the mask for width as well. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > val = I915_READ(PLANE_STRIDE(pipe, plane_id)); > -- > 2.19.1
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 15006764862b..5103504bbbec 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, return 5120; } +static int skl_max_plane_height(void) +{ + return 4096; +} + +static int icl_max_plane_height(void) +{ + return 4320; +} + static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, int main_x, int main_y, u32 main_offset) { @@ -3391,7 +3401,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) int w = drm_rect_width(&plane_state->base.src) >> 16; int h = drm_rect_height(&plane_state->base.src) >> 16; int max_width; - int max_height = 4096; + int max_height; u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; if (INTEL_GEN(dev_priv) >= 11) @@ -3401,6 +3411,11 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) else max_width = skl_max_plane_width(fb, 0, rotation); + if (INTEL_GEN(dev_priv) >= 11) + max_height = icl_max_plane_height(); + else + max_height = skl_max_plane_height(); + if (w > max_width || h > max_height) { DRM_DEBUG_KMS("requested Y/RGB source size %dx%d too big (limit %dx%d)\n", w, h, max_width, max_height); @@ -9865,7 +9880,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); val = I915_READ(PLANE_SIZE(pipe, plane_id)); - fb->height = ((val >> 16) & 0xfff) + 1; + fb->height = ((val >> 16) & 0xffff) + 1; fb->width = ((val >> 0) & 0x1fff) + 1; val = I915_READ(PLANE_STRIDE(pipe, plane_id));
On ICL+, the max supported plane height is 4320, so bump it up To support 4320, we need to increase the number of bits used to read plane_height to 13 as opposed to older 12 bits. v3: * Use 0xffff for mask as extra bits are mbz (Ville) v2: * ICL plane height supported is 4320 (Ville) * Add a new line between max width and max height (Jose) Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-)