clk: imx: imx8mm: fix audio pll setting

Commit Message

Peng Fan July 15, 2019, 2:55 a.m. UTC

From: Peng Fan <[e-mail]>

The AUDIO PLL max support 650M, so the original clk settings violate
spec. This patch makes the output 786432000 -> 393216000,
and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
impact on audio functionality and go within 650MHz PLL limit.

Cc: <[e-mail]>
Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Peng Fan <[e-mail]>
---
 drivers/clk/imx/clk-imx8mm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Abel Vesa July 15, 2019, 7:27 a.m. UTC | #1

On 19-07-15 02:55:43, Peng Fan wrote:
> From: Peng Fan <[e-mail]>
> 
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
> 
> Cc: <[e-mail]>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <[e-mail]>

Acked-by: Abel Vesa <[e-mail]>

> ---
>  drivers/clk/imx/clk-imx8mm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 3a873e0e278f..b72bad064d8d 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -55,8 +55,8 @@ static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
>  };
>  
>  static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] = {
> -	PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),
> -	PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),
> +	PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
> +	PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
>  };
>  
>  static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] = {
> -- 
> 2.16.4
>

Stephen Boyd July 22, 2019, 10:06 p.m. UTC | #2

Quoting Peng Fan (2019-07-14 19:55:43)
> From: Peng Fan <[e-mail]>
> 
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
> 
> Cc: <[e-mail]>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <[e-mail]>
> ---

Is this a problem right now, i.e. should I apply this to clk-fixes? Or
can this wait until next merge window?

Peng Fan July 23, 2019, 12:56 a.m. UTC | #3

Hi Stephen,

> Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting
> 
> Quoting Peng Fan (2019-07-14 19:55:43)
> > From: Peng Fan <[e-mail]>
> >
> > The AUDIO PLL max support 650M, so the original clk settings violate
> > spec. This patch makes the output 786432000 -> 393216000, and
> > 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> > impact on audio functionality and go within 650MHz PLL limit.
> >
> > Cc: <[e-mail]>
> > Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> > Signed-off-by: Peng Fan <[e-mail]>
> > ---
> 
> Is this a problem right now, i.e. should I apply this to clk-fixes? Or can this wait
> until next merge window?

Could wait until next merge window.

Thanks,
Peng.

Shawn Guo July 23, 2019, 6:21 a.m. UTC | #4

On Mon, Jul 15, 2019 at 02:55:43AM +0000, Peng Fan wrote:
> From: Peng Fan <[e-mail]>
> 
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
> 
> Cc: <[e-mail]>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <[e-mail]>

Applied, thanks.

Patch

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 3a873e0e278f..b72bad064d8d 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -55,8 +55,8 @@  static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
 };
 
 static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] = {
-	PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),
-	PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),
+	PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
+	PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
 };
 
 static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] = {