diff mbox series

[v3,02/18] ram: rk3399: Clear PI_175 interrupts in data training

Message ID 20190715182856.21688-3-jagan@amarulasolutions.com (mailing list archive)
State New, archived
Headers show
Series ram: rk3399: Add rank detection | expand

Commit Message

Jagan Teki July 15, 2019, 6:28 p.m. UTC
Clear the PI_175 interrupts before processing actual
data training in all relevant calls.

This would help to clear interrupt from previous training.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 drivers/ram/rockchip/sdram_rk3399.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Kever Yang July 16, 2019, 7:36 a.m. UTC | #1
On 2019/7/16 上午2:28, Jagan Teki wrote:
> Clear the PI_175 interrupts before processing actual
> data training in all relevant calls.
>
> This would help to clear interrupt from previous training.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: YouMin Chen <cym@rock-chips.com>

Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>

Thanks,
  - Kever
> ---
>   drivers/ram/rockchip/sdram_rk3399.c | 15 +++++++++++++++
>   1 file changed, 15 insertions(+)
>
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index e9c0fdf2d4..fe26144f27 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -627,6 +627,9 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
>   	u32 obs_0, obs_1, obs_2, obs_err = 0;
>   	u32 rank = params->ch[channel].cap_info.rank;
>   
> +	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
> +	writel(0x00003f7c, (&denali_pi[175]));
> +
>   	for (i = 0; i < rank; i++) {
>   		select_per_cs_training_index(chan, i);
>   
> @@ -681,6 +684,9 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
>   	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
>   	u32 rank = params->ch[channel].cap_info.rank;
>   
> +	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
> +	writel(0x00003f7c, (&denali_pi[175]));
> +
>   	for (i = 0; i < rank; i++) {
>   		select_per_cs_training_index(chan, i);
>   
> @@ -740,6 +746,9 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
>   	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
>   	u32 rank = params->ch[channel].cap_info.rank;
>   
> +	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
> +	writel(0x00003f7c, (&denali_pi[175]));
> +
>   	for (i = 0; i < rank; i++) {
>   		select_per_cs_training_index(chan, i);
>   
> @@ -799,6 +808,9 @@ static int data_training_rl(const struct chan_info *chan, u32 channel,
>   	u32 i, tmp;
>   	u32 rank = params->ch[channel].cap_info.rank;
>   
> +	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
> +	writel(0x00003f7c, (&denali_pi[175]));
> +
>   	for (i = 0; i < rank; i++) {
>   		select_per_cs_training_index(chan, i);
>   
> @@ -844,6 +856,9 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
>   	u32 i, tmp;
>   	u32 rank = params->ch[channel].cap_info.rank;
>   
> +	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
> +	writel(0x00003f7c, (&denali_pi[175]));
> +
>   	for (i = 0; i < rank; i++) {
>   		select_per_cs_training_index(chan, i);
>
diff mbox series

Patch

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index e9c0fdf2d4..fe26144f27 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -627,6 +627,9 @@  static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_err = 0;
 	u32 rank = params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 
@@ -681,6 +684,9 @@  static int data_training_wl(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
 	u32 rank = params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 
@@ -740,6 +746,9 @@  static int data_training_rg(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
 	u32 rank = params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 
@@ -799,6 +808,9 @@  static int data_training_rl(const struct chan_info *chan, u32 channel,
 	u32 i, tmp;
 	u32 rank = params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 
@@ -844,6 +856,9 @@  static int data_training_wdql(const struct chan_info *chan, u32 channel,
 	u32 i, tmp;
 	u32 rank = params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);