| Message ID | 20190716115745.12585-11-jagan@amarulasolutions.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ram: rk3399: Add LPDDR4 support | expand |
On 2019/7/16 下午7:56, Jagan Teki wrote: > Add simplified and meaningful macro for cs1_rw. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ > drivers/ram/rockchip/sdram_rk3399.c | 3 +-- > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h > index ad9726a57c..578db90241 100644 > --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h > +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h > @@ -94,6 +94,8 @@ struct sdram_base_params { > SYS_REG_CS0_ROW_SHIFT(ch)) > #define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16) > #define SYS_REG_CS1_ROW_MASK 3 > +#define SYS_REG_ENC_CS1_ROW(n, ch) (((n) - 13) << \ > + SYS_REG_CS1_ROW_SHIFT(ch)) > #define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16) > #define SYS_REG_BW_MASK 3 > #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) > diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c > index 43cf597828..a83709f271 100644 > --- a/drivers/ram/rockchip/sdram_rk3399.c > +++ b/drivers/ram/rockchip/sdram_rk3399.c > @@ -1095,8 +1095,7 @@ static void dram_all_config(struct dram_info *dram, > sys_reg |= SYS_REG_ENC_COL(info->cap_info.col, channel); > sys_reg |= SYS_REG_ENC_BK(info->cap_info.bk, channel); > sys_reg |= SYS_REG_ENC_CS0_ROW(info->cap_info.cs0_row, channel); > - sys_reg |= (info->cap_info.cs1_row - 13) << > - SYS_REG_CS1_ROW_SHIFT(channel); > + sys_reg |= SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, channel); > sys_reg |= (2 >> info->cap_info.bw) << > SYS_REG_BW_SHIFT(channel); > sys_reg |= SYS_REG_ENC_DBW(info->cap_info.dbw, channel);
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h index ad9726a57c..578db90241 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h @@ -94,6 +94,8 @@ struct sdram_base_params { SYS_REG_CS0_ROW_SHIFT(ch)) #define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16) #define SYS_REG_CS1_ROW_MASK 3 +#define SYS_REG_ENC_CS1_ROW(n, ch) (((n) - 13) << \ + SYS_REG_CS1_ROW_SHIFT(ch)) #define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16) #define SYS_REG_BW_MASK 3 #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 43cf597828..a83709f271 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1095,8 +1095,7 @@ static void dram_all_config(struct dram_info *dram, sys_reg |= SYS_REG_ENC_COL(info->cap_info.col, channel); sys_reg |= SYS_REG_ENC_BK(info->cap_info.bk, channel); sys_reg |= SYS_REG_ENC_CS0_ROW(info->cap_info.cs0_row, channel); - sys_reg |= (info->cap_info.cs1_row - 13) << - SYS_REG_CS1_ROW_SHIFT(channel); + sys_reg |= SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, channel); sys_reg |= (2 >> info->cap_info.bw) << SYS_REG_BW_SHIFT(channel); sys_reg |= SYS_REG_ENC_DBW(info->cap_info.dbw, channel);