[v3,26/57] ram: rk3399: Configure PHY_898, PHY_919 for lpddr4
diff mbox series

Message ID 20190716115745.12585-27-jagan@amarulasolutions.com
State New
Headers show
Series
  • ram: rk3399: Add LPDDR4 support
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Commit Message

Jagan Teki July 16, 2019, 11:57 a.m. UTC
PHY_898, PHY_919 would require to configure PHY LP4 boot
pll control and ca for lpddr4.

So, configure the same in pctl_cfg for LPDDR4.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 drivers/ram/rockchip/sdram_rk3399.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Kever Yang July 16, 2019, 1:12 p.m. UTC | #1
On 2019/7/16 下午7:57, Jagan Teki wrote:
> PHY_898, PHY_919 would require to configure PHY LP4 boot
> pll control and ca for lpddr4.
>
> So, configure the same in pctl_cfg for LPDDR4.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: YouMin Chen <cym@rock-chips.com>

Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>

Thanks,
  - Kever
> ---
>   drivers/ram/rockchip/sdram_rk3399.c | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index beb4f6de54..7625506458 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -574,6 +574,11 @@ static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,
>   	writel(params->phy_regs.denali_phy[911], &denali_phy[911]);
>   	writel(params->phy_regs.denali_phy[912], &denali_phy[912]);
>   
> +	if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) {
> +		writel(params->phy_regs.denali_phy[898], &denali_phy[898]);
> +		writel(params->phy_regs.denali_phy[919], &denali_phy[919]);
> +	}
> +
>   	dram->pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &
>   					     PWRUP_SREFRESH_EXIT;
>   	clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);

Patch
diff mbox series

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index beb4f6de54..7625506458 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -574,6 +574,11 @@  static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,
 	writel(params->phy_regs.denali_phy[911], &denali_phy[911]);
 	writel(params->phy_regs.denali_phy[912], &denali_phy[912]);
 
+	if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) {
+		writel(params->phy_regs.denali_phy[898], &denali_phy[898]);
+		writel(params->phy_regs.denali_phy[919], &denali_phy[919]);
+	}
+
 	dram->pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &
 					     PWRUP_SREFRESH_EXIT;
 	clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);