[v3,40/57] ram: rk3399: Update lpddr4 vref_mode_ac
diff mbox series

Message ID 20190716115745.12585-41-jagan@amarulasolutions.com
State New
Headers show
Series
  • ram: rk3399: Add LPDDR4 support
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Commit Message

Jagan Teki July 16, 2019, 11:57 a.m. UTC
Update vref_mode_ac for lpddr4 based on VDDQ/3/2=16.8%

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 drivers/ram/rockchip/sdram_rk3399.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Kever Yang July 16, 2019, 1:17 p.m. UTC | #1
On 2019/7/16 下午7:57, Jagan Teki wrote:
> Update vref_mode_ac for lpddr4 based on VDDQ/3/2=16.8%
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: YouMin Chen <cym@rock-chips.com>

Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>

Thanks,
  - Kever
> ---
>   drivers/ram/rockchip/sdram_rk3399.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index 63763062f9..e3f1abf7e7 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -366,7 +366,8 @@ static int phy_io_config(const struct chan_info *chan,
>   			vref_value_dq = (rd_vref - 15300) / 521;
>   		}
>   		vref_mode_ac = 0x6;
> -		vref_value_ac = 0x1f;
> +		/* VDDQ/3/2=16.8% */
> +		vref_value_ac = 0x3;
>   	} else if (params->base.dramtype == LPDDR3) {
>   		if (params->base.odt == 1) {
>   			vref_mode_dq = 0x5;  /* LPDDR3 ODT */

Patch
diff mbox series

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 63763062f9..e3f1abf7e7 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -366,7 +366,8 @@  static int phy_io_config(const struct chan_info *chan,
 			vref_value_dq = (rd_vref - 15300) / 521;
 		}
 		vref_mode_ac = 0x6;
-		vref_value_ac = 0x1f;
+		/* VDDQ/3/2=16.8% */
+		vref_value_ac = 0x3;
 	} else if (params->base.dramtype == LPDDR3) {
 		if (params->base.odt == 1) {
 			vref_mode_dq = 0x5;  /* LPDDR3 ODT */