mtip32xx: Prefer pcie_capability_read_word()
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Message ID 20190718020745.8867-6-fred@fredlawl.com
State New
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Series
  • mtip32xx: Prefer pcie_capability_read_word()
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Commit Message

Frederick Lawler July 18, 2019, 2:07 a.m. UTC
Commit 8c0d3a02c130 ("PCI: Add accessors for PCI Express Capability")
added accessors for the PCI Express Capability so that drivers didn't
need to be aware of differences between v1 and v2 of the PCI
Express Capability.

Replace pci_read_config_word() and pci_write_config_word() calls with
pcie_capability_read_word() and pcie_capability_write_word().

Signed-off-by: Frederick Lawler <fred@fredlawl.com>
---
 drivers/block/mtip32xx/mtip32xx.c | 28 ++++++++++++----------------
 1 file changed, 12 insertions(+), 16 deletions(-)

Comments

Bjorn Helgaas July 18, 2019, 12:48 p.m. UTC | #1
On Wed, Jul 17, 2019 at 9:09 PM Frederick Lawler <fred@fredlawl.com> wrote:
>
> Commit 8c0d3a02c130 ("PCI: Add accessors for PCI Express Capability")
> added accessors for the PCI Express Capability so that drivers didn't
> need to be aware of differences between v1 and v2 of the PCI
> Express Capability.
>
> Replace pci_read_config_word() and pci_write_config_word() calls with
> pcie_capability_read_word() and pcie_capability_write_word().
>
> Signed-off-by: Frederick Lawler <fred@fredlawl.com>
> ---
>  drivers/block/mtip32xx/mtip32xx.c | 28 ++++++++++++----------------
>  1 file changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c
> index f0105d118056..b7b26e33248b 100644
> --- a/drivers/block/mtip32xx/mtip32xx.c
> +++ b/drivers/block/mtip32xx/mtip32xx.c
> @@ -3952,22 +3952,18 @@ static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
>         int pos;
>         unsigned short pcie_dev_ctrl;
>
> -       pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
> -       if (pos) {
> -               pci_read_config_word(pdev,
> -                       pos + PCI_EXP_DEVCTL,
> -                       &pcie_dev_ctrl);
> -               if (pcie_dev_ctrl & (1 << 11) ||
> -                   pcie_dev_ctrl & (1 << 4)) {
> -                       dev_info(&dd->pdev->dev,
> -                               "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
> -                                       pdev->vendor, pdev->device);
> -                       pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
> -                                               PCI_EXP_DEVCTL_RELAX_EN);
> -                       pci_write_config_word(pdev,
> -                               pos + PCI_EXP_DEVCTL,
> -                               pcie_dev_ctrl);
> -               }
> +       if (!pci_is_pcie(pdev))
> +               return;
> +
> +       pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &pcie_dev_ctrl);
> +       if (pcie_dev_ctrl & (1 << 11) ||
> +           pcie_dev_ctrl & (1 << 4)) {

Hmm, sort of sloppy that  d1e714db8129 ("mtip32xx: Fix ERO and NoSnoop
values in PCIe upstream on AMD systems") used
PCI_EXP_DEVCTL_NOSNOOP_EN and PCI_EXP_DEVCTL_RELAX_EN below, but not
here.  Could be fixed with a separate follow-on patch.

> +               dev_info(&dd->pdev->dev,
> +                        "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
> +                        pdev->vendor, pdev->device);
> +               pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
> +                                       PCI_EXP_DEVCTL_RELAX_EN);
> +               pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, pcie_dev_ctrl);
>         }
>  }
>
> --
> 2.17.1
>

Patch
diff mbox series

diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c
index f0105d118056..b7b26e33248b 100644
--- a/drivers/block/mtip32xx/mtip32xx.c
+++ b/drivers/block/mtip32xx/mtip32xx.c
@@ -3952,22 +3952,18 @@  static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
 	int pos;
 	unsigned short pcie_dev_ctrl;
 
-	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
-	if (pos) {
-		pci_read_config_word(pdev,
-			pos + PCI_EXP_DEVCTL,
-			&pcie_dev_ctrl);
-		if (pcie_dev_ctrl & (1 << 11) ||
-		    pcie_dev_ctrl & (1 << 4)) {
-			dev_info(&dd->pdev->dev,
-				"Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
-					pdev->vendor, pdev->device);
-			pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
-						PCI_EXP_DEVCTL_RELAX_EN);
-			pci_write_config_word(pdev,
-				pos + PCI_EXP_DEVCTL,
-				pcie_dev_ctrl);
-		}
+	if (!pci_is_pcie(pdev))
+		return;
+
+	pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &pcie_dev_ctrl);
+	if (pcie_dev_ctrl & (1 << 11) ||
+	    pcie_dev_ctrl & (1 << 4)) {
+		dev_info(&dd->pdev->dev,
+			 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
+			 pdev->vendor, pdev->device);
+		pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
+					PCI_EXP_DEVCTL_RELAX_EN);
+		pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, pcie_dev_ctrl);
 	}
 }