drm/bridge: dw-hdmi: Refuse DDC/CI transfers on the internal I2C controller
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Message ID 20190718214135.79445-1-mka@chromium.org
State New
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Series
  • drm/bridge: dw-hdmi: Refuse DDC/CI transfers on the internal I2C controller
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Commit Message

Matthias Kaehlcke July 18, 2019, 9:41 p.m. UTC
The DDC/CI protocol involves sending a multi-byte request to the
display via I2C, which is typically followed by a multi-byte
response. The internal I2C controller only allows single byte
reads/writes or reads of 8 sequential bytes, hence DDC/CI is not
supported when the internal I2C controller is used. The I2C
transfers complete without errors, however the data in the response
is garbage. Abort transfers to/from slave address 0x37 (DDC) with
-EOPNOTSUPP, to make it evident that the communication is failing.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Adam Jackson July 19, 2019, 4:23 p.m. UTC | #1
On Thu, 2019-07-18 at 14:41 -0700, Matthias Kaehlcke wrote:

> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> index 045b1b13fd0e..e49402ebd56f 100644
> --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> @@ -35,6 +35,7 @@
>  
>  #include <media/cec-notifier.h>
>  
> +#define DDC_I2C_ADDR		0x37

This confused the heck out of me to read, DDC by definition happens
over I2C and this one address is just for a specific subset of DDC.
Perhaps this would be clearer if it was named DDC_CI_ADDR.

- ajax
Matthias Kaehlcke July 19, 2019, 4:45 p.m. UTC | #2
On Fri, Jul 19, 2019 at 12:23:26PM -0400, Adam Jackson wrote:
> On Thu, 2019-07-18 at 14:41 -0700, Matthias Kaehlcke wrote:
> 
> > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > index 045b1b13fd0e..e49402ebd56f 100644
> > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > @@ -35,6 +35,7 @@
> >  
> >  #include <media/cec-notifier.h>
> >  
> > +#define DDC_I2C_ADDR		0x37
> 
> This confused the heck out of me to read, DDC by definition happens
> over I2C and this one address is just for a specific subset of DDC.
> Perhaps this would be clearer if it was named DDC_CI_ADDR.

I was also a bit confused about the terminology, some places call 0x37
the DDC address and 0x50 the EDID address.

DDC_CI_ADDR sounds good to me, thanks for the suggestion!

I'll wait a day or two before respinning, for if there are more comments.

Patch
diff mbox series

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 045b1b13fd0e..e49402ebd56f 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -35,6 +35,7 @@ 
 
 #include <media/cec-notifier.h>
 
+#define DDC_I2C_ADDR		0x37
 #define DDC_SEGMENT_ADDR	0x30
 
 #define HDMI_EDID_LEN		512
@@ -322,6 +323,13 @@  static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
 	u8 addr = msgs[0].addr;
 	int i, ret = 0;
 
+	if (addr == DDC_I2C_ADDR)
+		/*
+		 * The internal I2C controller does not support the multi-byte
+		 * read and write operations needed for DDC/VCP.
+		 */
+		return -EOPNOTSUPP;
+
 	dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
 
 	for (i = 0; i < num; i++) {