| Message ID | 20190722074348.29582-2-vkoul@kernel.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Andy Gross |
| Headers | show |
| Series | clk: qcom: Add support for SM8150 GCC | expand |
Quoting Vinod Koul (2019-07-22 00:43:44) > Commit 8f9fab480c7a ("linux/kernel.h: fix overflow for > DIV_ROUND_UP_ULL") fixed the overflow for DIV_ROUND_UP_ULL, so we no > longer need the cast for DIV_ROUND_UP_ULL, so remove the unnecessary > u64 casts. > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- Applied to clk-next
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 0ced4a5a9a17..b48707693ffd 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -832,7 +832,7 @@ static int clk_alpha_pll_postdiv_set_rate(struct clk_hw *hw, unsigned long rate, int div; /* 16 -> 0xf, 8 -> 0x7, 4 -> 0x3, 2 -> 0x1, 1 -> 0x0 */ - div = DIV_ROUND_UP_ULL((u64)parent_rate, rate) - 1; + div = DIV_ROUND_UP_ULL(parent_rate, rate) - 1; return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_POST_DIV_MASK(pll) << PLL_POST_DIV_SHIFT, @@ -1094,7 +1094,7 @@ static int clk_alpha_pll_postdiv_fabia_set_rate(struct clk_hw *hw, return -EINVAL; } - div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); + div = DIV_ROUND_UP_ULL(parent_rate, rate); for (i = 0; i < pll->num_post_div; i++) { if (pll->post_div_table[i].div == div) { val = pll->post_div_table[i].val;
Commit 8f9fab480c7a ("linux/kernel.h: fix overflow for DIV_ROUND_UP_ULL") fixed the overflow for DIV_ROUND_UP_ULL, so we no longer need the cast for DIV_ROUND_UP_ULL, so remove the unnecessary u64 casts. Signed-off-by: Vinod Koul <vkoul@kernel.org> --- drivers/clk/qcom/clk-alpha-pll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)