[7/9] drm/i915/huc: Copy huc rsa only once
diff mbox series

Message ID 20190722232048.9970-8-daniele.ceraolospurio@intel.com
State New
Headers show
Series
  • uC fw path unification + misc clean-up
Related show

Commit Message

Daniele Ceraolo Spurio July 22, 2019, 11:20 p.m. UTC
The binary is perma-pinned and the rsa is not going to change, so copy
it only once and not on every load.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Fernando Pacheco <fernando.pacheco@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_huc.c    | 21 +++++++++++++++++----
 drivers/gpu/drm/i915/gt/uc/intel_huc.h    |  1 -
 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 14 --------------
 3 files changed, 17 insertions(+), 19 deletions(-)

Comments

Chris Wilson July 23, 2019, 8:37 a.m. UTC | #1
Quoting Daniele Ceraolo Spurio (2019-07-23 00:20:46)
> The binary is perma-pinned and the rsa is not going to change, so copy
> it only once and not on every load.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Fernando Pacheco <fernando.pacheco@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_huc.c    | 21 +++++++++++++++++----
>  drivers/gpu/drm/i915/gt/uc/intel_huc.h    |  1 -
>  drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 14 --------------
>  3 files changed, 17 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> index 1868f676d890..daf5996ec989 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> @@ -62,6 +62,7 @@ static int intel_huc_rsa_data_create(struct intel_huc *huc)
>          * the authentication since its GGTT offset will be GuC
>          * accessible.
>          */
> +       GEM_BUG_ON(huc->fw.rsa_size > PAGE_SIZE);
>         vma = intel_guc_allocate_vma(guc, PAGE_SIZE);
>         if (IS_ERR(vma))
>                 return PTR_ERR(vma);
> @@ -72,26 +73,38 @@ static int intel_huc_rsa_data_create(struct intel_huc *huc)
>                 return PTR_ERR(vaddr);
>         }
>  
> +       intel_uc_fw_copy_rsa(&huc->fw, vaddr, vma->size);

copied = ^^^
GEM_BUG_ON(copied < huc->fw_.rsa_size);

> +
> +       i915_gem_object_unpin_map(vma->obj);
> +
>         huc->rsa_data = vma;
> -       huc->rsa_data_vaddr = vaddr;
>  
>         return 0;
>  }
>  
>  static void intel_huc_rsa_data_destroy(struct intel_huc *huc)
>  {
> -       i915_vma_unpin_and_release(&huc->rsa_data, I915_VMA_RELEASE_MAP);
> +       i915_vma_unpin_and_release(&huc->rsa_data, 0);
>  }
>  
>  int intel_huc_init(struct intel_huc *huc)
>  {
>         int err;
>  
> -       err = intel_huc_rsa_data_create(huc);
> +       err = intel_uc_fw_init(&huc->fw);
>         if (err)
>                 return err;
>  
> -       return intel_uc_fw_init(&huc->fw);
> +       /*
> +        * HuC firmware image is outside GuC accessible range.
> +        * Copy the RSA signature out of the image into
> +        * a perma-pinned region set aside for it
> +        */
> +       err = intel_huc_rsa_data_create(huc);
> +       if (err)
> +               intel_uc_fw_fini(&huc->fw);
> +
> +       return err;

Joonas would like to say onion early.

>  }
>  
>  void intel_huc_fini(struct intel_huc *huc)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
> index 9fa3d4629f2e..3f945115bb47 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
> @@ -35,7 +35,6 @@ struct intel_huc {
>  
>         /* HuC-specific additions */
>         struct i915_vma *rsa_data;
> -       void *rsa_data_vaddr;
>  
>         struct {
>                 i915_reg_t reg;
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> index f200f6d49e60..06aa29f5bf43 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> @@ -62,18 +62,6 @@ void intel_huc_fw_init_early(struct intel_huc *huc)
>                            huc_fw_blobs, ARRAY_SIZE(huc_fw_blobs));
>  }
>  
> -static void huc_xfer_rsa(struct intel_huc *huc)
> -{
> -       /*
> -        * HuC firmware image is outside GuC accessible range.
> -        * Copy the RSA signature out of the image into
> -        * the perma-pinned region set aside for it
> -        */
> -       GEM_BUG_ON(huc->fw.rsa_size > huc->rsa_data->size);
> -       intel_uc_fw_copy_rsa(&huc->fw, huc->rsa_data_vaddr,
> -                            huc->rsa_data->size);
> -}
> -
>  static int huc_xfer_ucode(struct intel_huc *huc)
>  {
>         struct intel_uc_fw *huc_fw = &huc->fw;
> @@ -133,8 +121,6 @@ static int huc_fw_xfer(struct intel_uc_fw *huc_fw)
>  {
>         struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
>  
> -       huc_xfer_rsa(huc);
> -
>         return huc_xfer_ucode(huc);
>  }

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index 1868f676d890..daf5996ec989 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -62,6 +62,7 @@  static int intel_huc_rsa_data_create(struct intel_huc *huc)
 	 * the authentication since its GGTT offset will be GuC
 	 * accessible.
 	 */
+	GEM_BUG_ON(huc->fw.rsa_size > PAGE_SIZE);
 	vma = intel_guc_allocate_vma(guc, PAGE_SIZE);
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
@@ -72,26 +73,38 @@  static int intel_huc_rsa_data_create(struct intel_huc *huc)
 		return PTR_ERR(vaddr);
 	}
 
+	intel_uc_fw_copy_rsa(&huc->fw, vaddr, vma->size);
+
+	i915_gem_object_unpin_map(vma->obj);
+
 	huc->rsa_data = vma;
-	huc->rsa_data_vaddr = vaddr;
 
 	return 0;
 }
 
 static void intel_huc_rsa_data_destroy(struct intel_huc *huc)
 {
-	i915_vma_unpin_and_release(&huc->rsa_data, I915_VMA_RELEASE_MAP);
+	i915_vma_unpin_and_release(&huc->rsa_data, 0);
 }
 
 int intel_huc_init(struct intel_huc *huc)
 {
 	int err;
 
-	err = intel_huc_rsa_data_create(huc);
+	err = intel_uc_fw_init(&huc->fw);
 	if (err)
 		return err;
 
-	return intel_uc_fw_init(&huc->fw);
+	/*
+	 * HuC firmware image is outside GuC accessible range.
+	 * Copy the RSA signature out of the image into
+	 * a perma-pinned region set aside for it
+	 */
+	err = intel_huc_rsa_data_create(huc);
+	if (err)
+		intel_uc_fw_fini(&huc->fw);
+
+	return err;
 }
 
 void intel_huc_fini(struct intel_huc *huc)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
index 9fa3d4629f2e..3f945115bb47 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
@@ -35,7 +35,6 @@  struct intel_huc {
 
 	/* HuC-specific additions */
 	struct i915_vma *rsa_data;
-	void *rsa_data_vaddr;
 
 	struct {
 		i915_reg_t reg;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
index f200f6d49e60..06aa29f5bf43 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
@@ -62,18 +62,6 @@  void intel_huc_fw_init_early(struct intel_huc *huc)
 			   huc_fw_blobs, ARRAY_SIZE(huc_fw_blobs));
 }
 
-static void huc_xfer_rsa(struct intel_huc *huc)
-{
-	/*
-	 * HuC firmware image is outside GuC accessible range.
-	 * Copy the RSA signature out of the image into
-	 * the perma-pinned region set aside for it
-	 */
-	GEM_BUG_ON(huc->fw.rsa_size > huc->rsa_data->size);
-	intel_uc_fw_copy_rsa(&huc->fw, huc->rsa_data_vaddr,
-			     huc->rsa_data->size);
-}
-
 static int huc_xfer_ucode(struct intel_huc *huc)
 {
 	struct intel_uc_fw *huc_fw = &huc->fw;
@@ -133,8 +121,6 @@  static int huc_fw_xfer(struct intel_uc_fw *huc_fw)
 {
 	struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
 
-	huc_xfer_rsa(huc);
-
 	return huc_xfer_ucode(huc);
 }