[2/3] RTF: drm/panel: simple: Add TI nspire panels
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Message ID 20190723133755.22677-3-linus.walleij@linaro.org
State New
Headers show
Series
  • RFT: PL111 DRM conversion of nspire
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Commit Message

Linus Walleij July 23, 2019, 1:37 p.m. UTC
This adds support for the TI nspire panels to the simple panel
roster. This code is based on arch/arm/mach-nspire/clcd.c.
This includes likely the first grayscale panel supported.

These panels will be used with the PL11x DRM driver.

Cc: Daniel Tang <dt.tangr@gmail.com>
Cc: Fabian Vogt <fabian@ritter-vogt.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/gpu/drm/panel/panel-simple.c | 63 ++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

Comments

Sam Ravnborg July 23, 2019, 5:54 p.m. UTC | #1
Hi Linus

Good to see more panels and work on moving from fb to drm.

Also good to use media_bus_format to signal this is a greyscale display.

On Tue, Jul 23, 2019 at 03:37:54PM +0200, Linus Walleij wrote:
> This adds support for the TI nspire panels to the simple panel
> roster. This code is based on arch/arm/mach-nspire/clcd.c.
> This includes likely the first grayscale panel supported.
> 
> These panels will be used with the PL11x DRM driver.
> 
> Cc: Daniel Tang <dt.tangr@gmail.com>
> Cc: Fabian Vogt <fabian@ritter-vogt.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 63 ++++++++++++++++++++++++++++
>  1 file changed, 63 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 5a93c4edf1e4..e5cfe1398a3b 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -2761,6 +2761,63 @@ static const struct panel_desc arm_rtsm = {
>  	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
>  };
>  
> +static const struct drm_display_mode nspire_cx_lcd_mode[] = {
Please name the variables like the compatible.
So something like ti_nspire_xxxx
Relevant for all variables.

When names are adjusted make sure the entries are sorted properly.
> +	{
> +		.clock = 1000,
> +		.hdisplay = 320,
> +		.hsync_start = 320 + 50,
> +		.hsync_end = 320 + 50 + 6,
> +		.htotal = 320 + 50 + 6 + 38,
> +		.vdisplay = 240,
> +		.vsync_start = 240 + 3,
> +		.vsync_end = 240 + 3 + 1,
> +		.vtotal = 240 + 3 + 1 + 17,
> +		.vrefresh = 60,
Can we achieve this refresh rate with a slow clock like this?

> +		.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+1 for specifying .flags.

> +	},
> +};
> +
> +static const struct panel_desc nspire_cx_lcd_panel = {
> +	.modes = nspire_cx_lcd_mode,
> +	.num_modes = 1,
> +	.bpc = 8,
> +	.size = {
> +		.width = 65,
> +		.height = 49,
> +	},
> +	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
> +	.bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE,
> +};
> +
> +static const struct drm_display_mode nspire_classic_lcd_mode[] = {
> +	{
> +		.clock = 1000,
> +		.hdisplay = 320,
> +		.hsync_start = 320 + 6,
> +		.hsync_end = 320 + 6 + 6,
> +		.htotal = 320 + 6 + 6 + 6,
> +		.vdisplay = 240,
> +		.vsync_start = 240 + 0,
> +		.vsync_end = 240 + 0 + 1,
> +		.vtotal = 240 + 0 + 1 + 0,
> +		.vrefresh = 60,
Ditto

> +		.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
> +	},
> +};
> +
> +static const struct panel_desc nspire_classic_lcd_panel = {
> +	.modes = nspire_classic_lcd_mode,
> +	.num_modes = 1,
> +	/* The grayscale panel has 8 bit for the color .. Y (black) */
> +	.bpc = 8,
> +	.size = {
> +		.width = 71,
> +		.height = 53,
> +	},
> +	/* This is the grayscale bus format */
> +	.bus_format = MEDIA_BUS_FMT_Y8_1X8,
No DRM_BUS_FLAG_PIXDATA here?
> +};
> +
>  static const struct of_device_id platform_of_match[] = {
>  	{
>  		.compatible = "ampire,am-480272h3tmqw-t01h",
> @@ -2966,6 +3023,12 @@ static const struct of_device_id platform_of_match[] = {
>  	}, {
>  		.compatible = "nlt,nl192108ac18-02d",
>  		.data = &nlt_nl192108ac18_02d,
> +	}, {
> +		.compatible = "ti,nspire-cx-lcd-panel",
> +		.data = &nspire_cx_lcd_panel,
> +	}, {
> +		.compatible = "ti,nspire-classic-lcd-panel",
> +		.data = &nspire_classic_lcd_panel,
>  	}, {

Should be sorted after compatible.
And with fixed naming this is the same as if name is used for sorting.

>  		.compatible = "nvd,9128",
>  		.data = &nvd_9128,


Furthermore I did not see any bindings for the panels.
If they indeed are missing, then please provide bindings in the yaml
format.

Thanks,

	Sam
Linus Walleij July 24, 2019, 1:58 p.m. UTC | #2
Hi Sam,

fixed most things, one question remain:

On Tue, Jul 23, 2019 at 7:54 PM Sam Ravnborg <sam@ravnborg.org> wrote:

> Furthermore I did not see any bindings for the panels.
> If they indeed are missing, then please provide bindings in the yaml
> format.

IIUC we do not create binding documents for the simple panels,
but I can do this of course, just vaguely remember that the DT
people didn't want to see bindings that all look the same
but instead rely on panel-common.txt

Yours,
Linus Walleij
Sam Ravnborg July 24, 2019, 6:53 p.m. UTC | #3
Hi Linus.

On Wed, Jul 24, 2019 at 03:58:40PM +0200, Linus Walleij wrote:
> Hi Sam,
> 
> fixed most things, one question remain:
> 
> On Tue, Jul 23, 2019 at 7:54 PM Sam Ravnborg <sam@ravnborg.org> wrote:
> 
> > Furthermore I did not see any bindings for the panels.
> > If they indeed are missing, then please provide bindings in the yaml
> > format.
> 
> IIUC we do not create binding documents for the simple panels,
> but I can do this of course, just vaguely remember that the DT
> people didn't want to see bindings that all look the same
> but instead rely on panel-common.txt

My understanding is that the bindings for th panels should list what is
required/optional, but with reference to panel-common (which IIRC has a
new name in the yaml world).
If you look in bindings/display/panels you can see a lot of simple
panels listed.

	Sam

Patch
diff mbox series

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 5a93c4edf1e4..e5cfe1398a3b 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -2761,6 +2761,63 @@  static const struct panel_desc arm_rtsm = {
 	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
 };
 
+static const struct drm_display_mode nspire_cx_lcd_mode[] = {
+	{
+		.clock = 1000,
+		.hdisplay = 320,
+		.hsync_start = 320 + 50,
+		.hsync_end = 320 + 50 + 6,
+		.htotal = 320 + 50 + 6 + 38,
+		.vdisplay = 240,
+		.vsync_start = 240 + 3,
+		.vsync_end = 240 + 3 + 1,
+		.vtotal = 240 + 3 + 1 + 17,
+		.vrefresh = 60,
+		.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+	},
+};
+
+static const struct panel_desc nspire_cx_lcd_panel = {
+	.modes = nspire_cx_lcd_mode,
+	.num_modes = 1,
+	.bpc = 8,
+	.size = {
+		.width = 65,
+		.height = 49,
+	},
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+	.bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE,
+};
+
+static const struct drm_display_mode nspire_classic_lcd_mode[] = {
+	{
+		.clock = 1000,
+		.hdisplay = 320,
+		.hsync_start = 320 + 6,
+		.hsync_end = 320 + 6 + 6,
+		.htotal = 320 + 6 + 6 + 6,
+		.vdisplay = 240,
+		.vsync_start = 240 + 0,
+		.vsync_end = 240 + 0 + 1,
+		.vtotal = 240 + 0 + 1 + 0,
+		.vrefresh = 60,
+		.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
+	},
+};
+
+static const struct panel_desc nspire_classic_lcd_panel = {
+	.modes = nspire_classic_lcd_mode,
+	.num_modes = 1,
+	/* The grayscale panel has 8 bit for the color .. Y (black) */
+	.bpc = 8,
+	.size = {
+		.width = 71,
+		.height = 53,
+	},
+	/* This is the grayscale bus format */
+	.bus_format = MEDIA_BUS_FMT_Y8_1X8,
+};
+
 static const struct of_device_id platform_of_match[] = {
 	{
 		.compatible = "ampire,am-480272h3tmqw-t01h",
@@ -2966,6 +3023,12 @@  static const struct of_device_id platform_of_match[] = {
 	}, {
 		.compatible = "nlt,nl192108ac18-02d",
 		.data = &nlt_nl192108ac18_02d,
+	}, {
+		.compatible = "ti,nspire-cx-lcd-panel",
+		.data = &nspire_cx_lcd_panel,
+	}, {
+		.compatible = "ti,nspire-classic-lcd-panel",
+		.data = &nspire_classic_lcd_panel,
 	}, {
 		.compatible = "nvd,9128",
 		.data = &nvd_9128,