| Message ID | 20190730213536.32697-1-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/ehl: Don't forget to handle port C's hotplug interrupts | expand |
On Tue, 2019-07-30 at 14:35 -0700, Matt Roper wrote: > We're mostly re-using ICL's interrupt handling on EHL, but we still > need > to remember to account for the extra combo port that EHL has. Use > TGP's > mask (which includes combo port C) rather than ICP's mask when > appropriate. Let's also skip reading TC-specific registers on this > platform since EHL doesn't have any TC ports. > > Cc: José Roberto de Souza <jose.souza@intel.com> > Cc: Vivek Kasireddy <vivek.kasireddy@intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/i915_irq.c | 41 ++++++++++++++++++++++++++++--- > -- > 1 file changed, 35 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c > b/drivers/gpu/drm/i915/i915_irq.c > index fbe13bacd5b7..621ca0edcd42 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1746,6 +1746,8 @@ static bool > icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val) > return val & ICP_DDIA_HPD_LONG_DETECT; > case HPD_PORT_B: > return val & ICP_DDIB_HPD_LONG_DETECT; > + case HPD_PORT_C: > + return val & TGP_DDIC_HPD_LONG_DETECT; > default: > return false; > } > @@ -2605,10 +2607,18 @@ static void cpt_irq_handler(struct > drm_i915_private *dev_priv, u32 pch_iir) > static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 > pch_iir, > const u32 *pins) > { > - u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP; > - u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP; > + u32 ddi_hotplug_trigger; > + u32 tc_hotplug_trigger; > u32 pin_mask = 0, long_mask = 0; > > + if (HAS_PCH_MCC(dev_priv)) { > + ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP; > + tc_hotplug_trigger = 0; > + } else { > + ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP; > + tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP; > + } > + > if (ddi_hotplug_trigger) { > u32 dig_hotplug_reg; > > @@ -3920,9 +3930,11 @@ static void icp_hpd_detection_setup(struct > drm_i915_private *dev_priv, > hotplug |= ddi_hotplug_enable_mask; > I915_WRITE(SHOTPLUG_CTL_DDI, hotplug); > > - hotplug = I915_READ(SHOTPLUG_CTL_TC); > - hotplug |= tc_hotplug_enable_mask; > - I915_WRITE(SHOTPLUG_CTL_TC, hotplug); > + if (!HAS_PCH_MCC(dev_priv)) { Maybe if (tc_hotplug_enable_mask)? Other than that: Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > + hotplug = I915_READ(SHOTPLUG_CTL_TC); > + hotplug |= tc_hotplug_enable_mask; > + I915_WRITE(SHOTPLUG_CTL_TC, hotplug); > + } > } > > static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv) > @@ -3938,6 +3950,18 @@ static void icp_hpd_irq_setup(struct > drm_i915_private *dev_priv) > ICP_TC_HPD_ENABLE_MASK); > } > > +static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv) > +{ > + u32 hotplug_irqs, enabled_irqs; > + > + hotplug_irqs = SDE_DDI_MASK_TGP; > + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_mcc); > + > + ibx_display_interrupt_update(dev_priv, hotplug_irqs, > enabled_irqs); > + > + icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0); > +} > + > static void tgp_hpd_irq_setup(struct drm_i915_private *dev_priv) > { > u32 hotplug_irqs, enabled_irqs; > @@ -4442,6 +4466,8 @@ static void icp_irq_postinstall(struct > drm_i915_private *dev_priv) > if (HAS_PCH_TGP(dev_priv)) > icp_hpd_detection_setup(dev_priv, > TGP_DDI_HPD_ENABLE_MASK, > TGP_TC_HPD_ENABLE_MASK); > + else if (HAS_PCH_MCC(dev_priv)) > + icp_hpd_detection_setup(dev_priv, > TGP_DDI_HPD_ENABLE_MASK, 0); > else > icp_hpd_detection_setup(dev_priv, > ICP_DDI_HPD_ENABLE_MASK, > ICP_TC_HPD_ENABLE_MASK); > @@ -4974,7 +5000,10 @@ void intel_irq_init(struct drm_i915_private > *dev_priv) > if (I915_HAS_HOTPLUG(dev_priv)) > dev_priv->display.hpd_irq_setup = > i915_hpd_irq_setup; > } else { > - if (INTEL_GEN(dev_priv) >= 11) > + if (HAS_PCH_MCC(dev_priv)) > + /* EHL doesn't need most of gen11_hpd_irq_setup > */ > + dev_priv->display.hpd_irq_setup = > mcc_hpd_irq_setup; > + else if (INTEL_GEN(dev_priv) >= 11) > dev_priv->display.hpd_irq_setup = > gen11_hpd_irq_setup; > else if (IS_GEN9_LP(dev_priv)) > dev_priv->display.hpd_irq_setup = > bxt_hpd_irq_setup;
Pushed to dinq. Thanks Jose for the review. Matt On Thu, Aug 01, 2019 at 01:19:04PM +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/ehl: Don't forget to handle port C's hotplug interrupts (rev2) > URL : https://patchwork.freedesktop.org/series/64452/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_6586_full -> Patchwork_13812_full > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. > > > > Known issues > ------------ > > Here are the changes found in Patchwork_13812_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_exec_balancer@smoke: > - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854]) > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb1/igt@gem_exec_balancer@smoke.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb3/igt@gem_exec_balancer@smoke.html > > * igt@gem_exec_suspend@basic-s3: > - shard-kbl: [PASS][3] -> ([PASS][4], [DMESG-WARN][5]) ([fdo#108566]) +10 similar issues > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-kbl1/igt@gem_exec_suspend@basic-s3.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-kbl7/igt@gem_exec_suspend@basic-s3.html > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-kbl4/igt@gem_exec_suspend@basic-s3.html > > * igt@gem_fence_thrash@bo-write-verify-threaded-y: > - shard-iclb: [PASS][6] -> [INCOMPLETE][7] ([fdo#107713] / [fdo#109100]) > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb3/igt@gem_fence_thrash@bo-write-verify-threaded-y.html > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb1/igt@gem_fence_thrash@bo-write-verify-threaded-y.html > > * igt@gem_partial_pwrite_pread@write-uncached: > - shard-iclb: [PASS][8] -> [INCOMPLETE][9] ([fdo#107713]) > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb7/igt@gem_partial_pwrite_pread@write-uncached.html > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb7/igt@gem_partial_pwrite_pread@write-uncached.html > > * igt@kms_cursor_crc@pipe-a-cursor-suspend: > - shard-skl: [PASS][10] -> ([INCOMPLETE][11], [PASS][12]) ([fdo#110741]) > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html > > * igt@kms_cursor_legacy@cursor-vs-flip-legacy: > - shard-snb: [PASS][13] -> ([PASS][14], [SKIP][15]) ([fdo#109271]) +1 similar issue > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-snb2/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-snb5/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-snb4/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html > > * igt@kms_flip@flip-vs-expired-vblank: > - shard-skl: [PASS][16] -> ([PASS][17], [FAIL][18]) ([fdo#105363]) > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-skl5/igt@kms_flip@flip-vs-expired-vblank.html > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html > > * igt@kms_flip_tiling@flip-changes-tiling-yf: > - shard-skl: [PASS][19] -> ([PASS][20], [FAIL][21]) ([fdo#108228] / [fdo#108303]) > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-skl7/igt@kms_flip_tiling@flip-changes-tiling-yf.html > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl1/igt@kms_flip_tiling@flip-changes-tiling-yf.html > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl3/igt@kms_flip_tiling@flip-changes-tiling-yf.html > > * igt@kms_frontbuffer_tracking@basic: > - shard-iclb: [PASS][22] -> [FAIL][23] ([fdo#103167]) +3 similar issues > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb2/igt@kms_frontbuffer_tracking@basic.html > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb1/igt@kms_frontbuffer_tracking@basic.html > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt: > - shard-snb: [PASS][24] -> [SKIP][25] ([fdo#109271]) +2 similar issues > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-snb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-snb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html > > * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt: > - shard-hsw: [PASS][26] -> ([SKIP][27], [PASS][28]) ([fdo#109271]) > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-hsw4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-hsw7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-hsw4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html > > * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt: > - shard-skl: [PASS][29] -> ([FAIL][30], [FAIL][31]) ([fdo#103167]) > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt.html > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt.html > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt.html > > * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move: > - shard-iclb: [PASS][32] -> [INCOMPLETE][33] ([fdo#106978] / [fdo#107713]) > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html > > * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: > - shard-apl: [PASS][34] -> ([PASS][35], [DMESG-WARN][36]) ([fdo#108566]) +1 similar issue > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html > > * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: > - shard-skl: [PASS][37] -> ([FAIL][38], [FAIL][39]) ([fdo#108145]) > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html > > * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: > - shard-skl: [PASS][40] -> ([FAIL][41], [PASS][42]) ([fdo#108145] / [fdo#110403]) > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > > * igt@kms_plane_lowres@pipe-a-tiling-y: > - shard-iclb: [PASS][43] -> [FAIL][44] ([fdo#103166]) > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb2/igt@kms_plane_lowres@pipe-a-tiling-y.html > [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-y.html > > * igt@kms_psr2_su@frontbuffer: > - shard-iclb: [PASS][45] -> [SKIP][46] ([fdo#109642] / [fdo#111068]) > [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb2/igt@kms_psr2_su@frontbuffer.html > [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb8/igt@kms_psr2_su@frontbuffer.html > > * igt@kms_psr@psr2_primary_page_flip: > - shard-iclb: [PASS][47] -> [SKIP][48] ([fdo#109441]) +1 similar issue > [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html > [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html > > > #### Possible fixes #### > > * igt@gem_softpin@noreloc-s3: > - shard-apl: [DMESG-WARN][49] ([fdo#108566]) -> ([PASS][50], [PASS][51]) +1 similar issue > [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-apl7/igt@gem_softpin@noreloc-s3.html > [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-apl1/igt@gem_softpin@noreloc-s3.html > [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-apl6/igt@gem_softpin@noreloc-s3.html > > * igt@kms_cursor_legacy@all-pipes-torture-bo: > - shard-iclb: [INCOMPLETE][52] ([fdo#107713]) -> [PASS][53] > [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb7/igt@kms_cursor_legacy@all-pipes-torture-bo.html > [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb1/igt@kms_cursor_legacy@all-pipes-torture-bo.html > > * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: > - shard-glk: [FAIL][54] ([fdo#105363]) -> ([PASS][55], [PASS][56]) > [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html > [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html > [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html > > * igt@kms_frontbuffer_tracking@fbc-suspend: > - shard-kbl: [DMESG-WARN][57] ([fdo#108566]) -> ([PASS][58], [PASS][59]) +2 similar issues > [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html > [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html > [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html > > * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite: > - shard-iclb: [FAIL][60] ([fdo#103167]) -> [PASS][61] +3 similar issues > [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html > [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html > > * igt@kms_psr@psr2_sprite_plane_move: > - shard-iclb: [SKIP][62] ([fdo#109441]) -> [PASS][63] +4 similar issues > [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-iclb3/igt@kms_psr@psr2_sprite_plane_move.html > [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html > > > #### Warnings #### > > * igt@i915_suspend@fence-restore-tiled2untiled: > - shard-apl: [DMESG-WARN][64] ([fdo#108566]) -> ([PASS][65], [DMESG-WARN][66]) ([fdo#108566]) > [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-apl5/igt@i915_suspend@fence-restore-tiled2untiled.html > [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html > [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html > > * igt@kms_setmode@basic: > - shard-kbl: [FAIL][67] ([fdo#99912]) -> ([FAIL][68], [PASS][69]) ([fdo#99912]) > [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/shard-kbl2/igt@kms_setmode@basic.html > [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-kbl2/igt@kms_setmode@basic.html > [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/shard-kbl4/igt@kms_setmode@basic.html > > > [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 > [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 > [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 > [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978 > [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 > [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 > [fdo#108228]: https://bugs.freedesktop.org/show_bug.cgi?id=108228 > [fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303 > [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 > [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 > [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 > [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 > [fdo#110741]: https://bugs.freedesktop.org/show_bug.cgi?id=110741 > [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 > [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 > [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 > > > Participating hosts (10 -> 10) > ------------------------------ > > No changes in participating hosts > > > Build changes > ------------- > > * CI: CI-20190529 -> None > * Linux: CI_DRM_6586 -> Patchwork_13812 > > CI-20190529: 20190529 > CI_DRM_6586: 066993443a56467f54fdcf560e89378f8e93a15b @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_5116: d2e6dd2f789596da5bd06efc2e9448e3160583b6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_13812: 6d2cec83dd6fb55ad998fc47aada4a1c723114da @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13812/
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index fbe13bacd5b7..621ca0edcd42 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1746,6 +1746,8 @@ static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val) return val & ICP_DDIA_HPD_LONG_DETECT; case HPD_PORT_B: return val & ICP_DDIB_HPD_LONG_DETECT; + case HPD_PORT_C: + return val & TGP_DDIC_HPD_LONG_DETECT; default: return false; } @@ -2605,10 +2607,18 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir, const u32 *pins) { - u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP; - u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP; + u32 ddi_hotplug_trigger; + u32 tc_hotplug_trigger; u32 pin_mask = 0, long_mask = 0; + if (HAS_PCH_MCC(dev_priv)) { + ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP; + tc_hotplug_trigger = 0; + } else { + ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP; + tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP; + } + if (ddi_hotplug_trigger) { u32 dig_hotplug_reg; @@ -3920,9 +3930,11 @@ static void icp_hpd_detection_setup(struct drm_i915_private *dev_priv, hotplug |= ddi_hotplug_enable_mask; I915_WRITE(SHOTPLUG_CTL_DDI, hotplug); - hotplug = I915_READ(SHOTPLUG_CTL_TC); - hotplug |= tc_hotplug_enable_mask; - I915_WRITE(SHOTPLUG_CTL_TC, hotplug); + if (!HAS_PCH_MCC(dev_priv)) { + hotplug = I915_READ(SHOTPLUG_CTL_TC); + hotplug |= tc_hotplug_enable_mask; + I915_WRITE(SHOTPLUG_CTL_TC, hotplug); + } } static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv) @@ -3938,6 +3950,18 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv) ICP_TC_HPD_ENABLE_MASK); } +static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv) +{ + u32 hotplug_irqs, enabled_irqs; + + hotplug_irqs = SDE_DDI_MASK_TGP; + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_mcc); + + ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs); + + icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0); +} + static void tgp_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; @@ -4442,6 +4466,8 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv) if (HAS_PCH_TGP(dev_priv)) icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, TGP_TC_HPD_ENABLE_MASK); + else if (HAS_PCH_MCC(dev_priv)) + icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0); else icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE_MASK); @@ -4974,7 +5000,10 @@ void intel_irq_init(struct drm_i915_private *dev_priv) if (I915_HAS_HOTPLUG(dev_priv)) dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup; } else { - if (INTEL_GEN(dev_priv) >= 11) + if (HAS_PCH_MCC(dev_priv)) + /* EHL doesn't need most of gen11_hpd_irq_setup */ + dev_priv->display.hpd_irq_setup = mcc_hpd_irq_setup; + else if (INTEL_GEN(dev_priv) >= 11) dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup; else if (IS_GEN9_LP(dev_priv)) dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
We're mostly re-using ICL's interrupt handling on EHL, but we still need to remember to account for the extra combo port that EHL has. Use TGP's mask (which includes combo port C) rather than ICP's mask when appropriate. Let's also skip reading TC-specific registers on this platform since EHL doesn't have any TC ports. Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Vivek Kasireddy <vivek.kasireddy@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/i915_irq.c | 41 ++++++++++++++++++++++++++++----- 1 file changed, 35 insertions(+), 6 deletions(-)