[v3,14/21] ARM: dts: imx6ull-colibri: Add sleep mode to fec
diff mbox series

Message ID 20190807082556.5013-15-philippe.schenker@toradex.com
State New
Headers show
Series
  • Common patches from downstream development
Related show

Commit Message

Philippe Schenker Aug. 7, 2019, 8:26 a.m. UTC
Do not change the clock as the power for this phy is switched
with that clock.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

Comments

Marcel Ziswiler Aug. 9, 2019, 3:38 p.m. UTC | #1
On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> Do not change the clock as the power for this phy is switched
> with that clock.
> 
> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>

Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index d56728f03c35..1019ce69a242 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -62,8 +62,9 @@
>  };
>  
>  &fec2 {
> -	pinctrl-names = "default";
> +	pinctrl-names = "default", "sleep";
>  	pinctrl-0 = <&pinctrl_enet2>;
> +	pinctrl-1 = <&pinctrl_enet2_sleep>;
>  	phy-mode = "rmii";
>  	phy-handle = <&ethphy1>;
>  	status = "okay";
> @@ -220,6 +221,21 @@
>  		>;
>  	};
>  
> +	pinctrl_enet2_sleep: enet2sleepgrp {
> +		fsl,pins = <
> +			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	0x0
> +			MX6UL_PAD_GPIO1_IO07__GPIO1_IO07	0x0
> +			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x0
> +			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	0x0
> +			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x0
> +			MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	0x0
> +			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x400
> 1b031
> +			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x0
> +			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	0x0
> +			MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	0x0
> +		>;
> +	};
> +
>  	pinctrl_ecspi1_cs: ecspi1-cs-grp {
>  		fsl,pins = <
>  			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x000a0

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index d56728f03c35..1019ce69a242 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -62,8 +62,9 @@ 
 };
 
 &fec2 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&pinctrl_enet2>;
+	pinctrl-1 = <&pinctrl_enet2_sleep>;
 	phy-mode = "rmii";
 	phy-handle = <&ethphy1>;
 	status = "okay";
@@ -220,6 +221,21 @@ 
 		>;
 	};
 
+	pinctrl_enet2_sleep: enet2sleepgrp {
+		fsl,pins = <
+			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	0x0
+			MX6UL_PAD_GPIO1_IO07__GPIO1_IO07	0x0
+			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x0
+			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	0x0
+			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x0
+			MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	0x0
+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
+			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x0
+			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	0x0
+			MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	0x0
+		>;
+	};
+
 	pinctrl_ecspi1_cs: ecspi1-cs-grp {
 		fsl,pins = <
 			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x000a0