| Message ID | 1565171600-11082-1-git-send-email-alexandru.elisei@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm/arm64: vgic: Reevaluate level sensitive interrupts on enable | expand |
On Wed, 7 Aug 2019 10:53:20 +0100 Alexandru Elisei <alexandru.elisei@arm.com> wrote: > A HW mapped level sensitive interrupt asserted by a device will not be put > into the ap_list if it is disabled at the VGIC level. When it is enabled > again, it will be inserted into the ap_list and written to a list register > on guest entry regardless of the state of the device. > > We could argue that this can also happen on real hardware, when the command > to enable the interrupt reached the GIC before the device had the chance to > de-assert the interrupt signal; however, we emulate the distributor and > redistributors in software and we can do better than that. > > Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> > --- > virt/kvm/arm/vgic/vgic-mmio.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c > index 3ba7278fb533..44efc2ff863f 100644 > --- a/virt/kvm/arm/vgic/vgic-mmio.c > +++ b/virt/kvm/arm/vgic/vgic-mmio.c > @@ -113,6 +113,22 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu, > struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); > > raw_spin_lock_irqsave(&irq->irq_lock, flags); > + if (vgic_irq_is_mapped_level(irq)) { > + bool was_high = irq->line_level; > + > + /* > + * We need to update the state of the interrupt because > + * the guest might have changed the state of the device > + * while the interrupt was disabled at the VGIC level. > + */ > + irq->line_level = vgic_get_phys_line_level(irq); > + /* > + * Deactivate the physical interrupt so the GIC will let > + * us know when it is asserted again. > + */ > + if (!irq->active && was_high && !irq->line_level) > + vgic_irq_set_phys_active(irq, false); > + } > irq->enabled = true; > vgic_queue_irq_unlock(vcpu->kvm, irq, flags); > Applied, thanks. M.
diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c index 3ba7278fb533..44efc2ff863f 100644 --- a/virt/kvm/arm/vgic/vgic-mmio.c +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -113,6 +113,22 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu, struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); raw_spin_lock_irqsave(&irq->irq_lock, flags); + if (vgic_irq_is_mapped_level(irq)) { + bool was_high = irq->line_level; + + /* + * We need to update the state of the interrupt because + * the guest might have changed the state of the device + * while the interrupt was disabled at the VGIC level. + */ + irq->line_level = vgic_get_phys_line_level(irq); + /* + * Deactivate the physical interrupt so the GIC will let + * us know when it is asserted again. + */ + if (!irq->active && was_high && !irq->line_level) + vgic_irq_set_phys_active(irq, false); + } irq->enabled = true; vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
A HW mapped level sensitive interrupt asserted by a device will not be put into the ap_list if it is disabled at the VGIC level. When it is enabled again, it will be inserted into the ap_list and written to a list register on guest entry regardless of the state of the device. We could argue that this can also happen on real hardware, when the command to enable the interrupt reached the GIC before the device had the chance to de-assert the interrupt signal; however, we emulate the distributor and redistributors in software and we can do better than that. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- virt/kvm/arm/vgic/vgic-mmio.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)