[03/22] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain

Message ID	1314639355-12713-4-git-send-email-khilman@ti.com (mailing list archive)
State	New, archived
Headers	show Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7THbHcp004359 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for <patchwork-linux-arm@patchwork.kernel.org>; Mon, 29 Aug 2011 17:38:21 GMT From: Kevin Hilman <khilman@ti.com> To: linux-omap@vger.kernel.org Subject: [PATCH 03/22] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain Date: Mon, 29 Aug 2011 10:35:36 -0700 Message-Id: <1314639355-12713-4-git-send-email-khilman@ti.com> In-Reply-To: <1314639355-12713-1-git-send-email-khilman@ti.com> References: <1314639355-12713-1-git-send-email-khilman@ti.com> summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.151 listed in list.dnswl.org] Cc: linux-arm-kernel@lists.infradead.org Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org

diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 3151d75..a366a6b 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, unsigned long target_volt) { u32 vpconfig; - u8 target_vsel, current_vsel, prm_irqst_reg; + u8 target_vsel, current_vsel; int ret, timeout = 0; ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel); if (ret) return ret; - prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; - /* * Clear all pending TransactionDone interrupt/status. Typical latency * is <3us */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & + vdd->prm_irqst_mod, vdd->prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) break; udelay(1); @@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ timeout = 0; - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, + vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status), VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) @@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & + vdd->prm_irqst_mod, vdd->prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) break; udelay(1); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index ffdc55e..db23d49 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -136,6 +136,7 @@ struct omap_vdd_info { bool vp_enabled; s16 prm_irqst_mod; + u8 prm_irqst_reg; u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct omap_vdd_info *vdd, diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 0d30b7f..f831f9a 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { static struct omap_vdd_info omap3_vdd1_info = { .prm_irqst_mod = OCP_MOD, + .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp1_data, .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, @@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { static struct omap_vdd_info omap3_vdd2_info = { .prm_irqst_mod = OCP_MOD, + .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp2_data, .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 1c2d7d7..64dc265 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { static struct omap_vdd_info omap4_vdd_mpu_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .vp_data = &omap4_vp_mpu_data, .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, @@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { static struct omap_vdd_info omap4_vdd_iva_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_iva_data, .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, @@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { static struct omap_vdd_info omap4_vdd_core_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_core_data, .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index d277da6..5406b08 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -70,16 +70,13 @@ struct omap_vp_common_data { /** * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data - * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg * - * XXX prm_irqst_reg does not belong here * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a * hardware bug * XXX This structure is probably not needed */ struct omap_vp_prm_irqst_data { - u8 prm_irqst_reg; u32 tranxdone_status; }; diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index c9b3e64..a8ea045 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -51,7 +51,6 @@ static const struct omap_vp_common_data omap3_vp_common = { }; static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, }; @@ -67,7 +66,6 @@ struct omap_vp_instance_data omap3_vp1_data = { }; static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, }; diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 1a0842e..0957c24 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -52,7 +52,6 @@ static const struct omap_vp_common_data omap4_vp_common = { }; static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, }; @@ -68,7 +67,6 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { }; static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, }; @@ -84,7 +82,6 @@ struct omap_vp_instance_data omap4_vp_iva_data = { }; static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, };

[03/22] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain

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