| Message ID | 20190816012343.36433-2-daniele.ceraolospurio@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Some more display uncore prep work | expand |
On Thu, Aug 15, 2019 at 6:24 PM Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> wrote: > > It has nothing to do with registers, so move it to the more appropriate > intel_display_power.h > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Imre Deak <imre.deak@intel.com> > --- > .../drm/i915/display/intel_display_power.c | 1 + > .../drm/i915/display/intel_display_power.h | 21 +++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_hdcp.c | 1 + > drivers/gpu/drm/i915/i915_reg.h | 21 ------------------- > 4 files changed, 23 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 374b75602141..1caae2f61216 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -13,6 +13,7 @@ > #include "intel_cdclk.h" > #include "intel_combo_phy.h" > #include "intel_csr.h" > +#include "intel_display_power.h" > #include "intel_display_types.h" > #include "intel_dpio_phy.h" > #include "intel_hotplug.h" > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > index 97f2562fc5d3..a50605b8b1ad 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > @@ -92,6 +92,27 @@ enum intel_display_power_domain { > POWER_DOMAIN_NUM, > }; > > +/* > + * i915_power_well_id: > + * > + * IDs used to look up power wells. Power wells accessed directly bypassing > + * the power domains framework must be assigned a unique ID. The rest of power > + * wells must be assigned DISP_PW_ID_NONE. > + */ > +enum i915_power_well_id { > + DISP_PW_ID_NONE, > + > + VLV_DISP_PW_DISP2D, > + BXT_DISP_PW_DPIO_CMN_A, > + VLV_DISP_PW_DPIO_CMN_BC, > + GLK_DISP_PW_DPIO_CMN_C, > + CHV_DISP_PW_DPIO_CMN_D, > + HSW_DISP_PW_GLOBAL, > + SKL_DISP_PW_MISC_IO, > + SKL_DISP_PW_1, > + SKL_DISP_PW_2, > +}; > + > #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A) > #define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \ > ((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER) > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c > index dc4aaec2e04c..0beb954b5318 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c > @@ -14,6 +14,7 @@ > #include <drm/i915_component.h> > > #include "i915_reg.h" > +#include "intel_display_power.h" > #include "intel_display_types.h" > #include "intel_hdcp.h" > #include "intel_sideband.h" > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 2b7ccebf6550..14165d619175 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1163,27 +1163,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) > #define PUNIT_REG_ISPSSPM0 0x39 > #define PUNIT_REG_ISPSSPM1 0x3a > > -/* > - * i915_power_well_id: > - * > - * IDs used to look up power wells. Power wells accessed directly bypassing > - * the power domains framework must be assigned a unique ID. The rest of power > - * wells must be assigned DISP_PW_ID_NONE. > - */ > -enum i915_power_well_id { > - DISP_PW_ID_NONE, > - > - VLV_DISP_PW_DISP2D, > - BXT_DISP_PW_DPIO_CMN_A, > - VLV_DISP_PW_DPIO_CMN_BC, > - GLK_DISP_PW_DPIO_CMN_C, > - CHV_DISP_PW_DPIO_CMN_D, > - HSW_DISP_PW_GLOBAL, > - SKL_DISP_PW_MISC_IO, > - SKL_DISP_PW_1, > - SKL_DISP_PW_2, > -}; drivers/gpu/drm/i915/display/intel_hdcp.c also uses this enum, so it should also include the header in which it's defined. other than that Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi > - > #define PUNIT_REG_PWRGT_CTRL 0x60 > #define PUNIT_REG_PWRGT_STATUS 0x61 > #define PUNIT_PWRGT_MASK(pw_idx) (3 << ((pw_idx) * 2)) > -- > 2.22.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On 8/15/19 9:52 PM, Lucas De Marchi wrote: > On Thu, Aug 15, 2019 at 6:24 PM Daniele Ceraolo Spurio > <daniele.ceraolospurio@intel.com> wrote: >> >> It has nothing to do with registers, so move it to the more appropriate >> intel_display_power.h >> >> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Cc: Imre Deak <imre.deak@intel.com> >> --- >> .../drm/i915/display/intel_display_power.c | 1 + >> .../drm/i915/display/intel_display_power.h | 21 +++++++++++++++++++ >> drivers/gpu/drm/i915/display/intel_hdcp.c | 1 + >> drivers/gpu/drm/i915/i915_reg.h | 21 ------------------- >> 4 files changed, 23 insertions(+), 21 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c >> index 374b75602141..1caae2f61216 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display_power.c >> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c >> @@ -13,6 +13,7 @@ >> #include "intel_cdclk.h" >> #include "intel_combo_phy.h" >> #include "intel_csr.h" >> +#include "intel_display_power.h" >> #include "intel_display_types.h" >> #include "intel_dpio_phy.h" >> #include "intel_hotplug.h" >> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h >> index 97f2562fc5d3..a50605b8b1ad 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display_power.h >> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h >> @@ -92,6 +92,27 @@ enum intel_display_power_domain { >> POWER_DOMAIN_NUM, >> }; >> >> +/* >> + * i915_power_well_id: >> + * >> + * IDs used to look up power wells. Power wells accessed directly bypassing >> + * the power domains framework must be assigned a unique ID. The rest of power >> + * wells must be assigned DISP_PW_ID_NONE. >> + */ >> +enum i915_power_well_id { >> + DISP_PW_ID_NONE, >> + >> + VLV_DISP_PW_DISP2D, >> + BXT_DISP_PW_DPIO_CMN_A, >> + VLV_DISP_PW_DPIO_CMN_BC, >> + GLK_DISP_PW_DPIO_CMN_C, >> + CHV_DISP_PW_DPIO_CMN_D, >> + HSW_DISP_PW_GLOBAL, >> + SKL_DISP_PW_MISC_IO, >> + SKL_DISP_PW_1, >> + SKL_DISP_PW_2, >> +}; >> + >> #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A) >> #define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \ >> ((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER) >> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c >> index dc4aaec2e04c..0beb954b5318 100644 >> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c >> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c >> @@ -14,6 +14,7 @@ >> #include <drm/i915_component.h> >> >> #include "i915_reg.h" >> +#include "intel_display_power.h" >> #include "intel_display_types.h" >> #include "intel_hdcp.h" >> #include "intel_sideband.h" >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >> index 2b7ccebf6550..14165d619175 100644 >> --- a/drivers/gpu/drm/i915/i915_reg.h >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> @@ -1163,27 +1163,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) >> #define PUNIT_REG_ISPSSPM0 0x39 >> #define PUNIT_REG_ISPSSPM1 0x3a >> >> -/* >> - * i915_power_well_id: >> - * >> - * IDs used to look up power wells. Power wells accessed directly bypassing >> - * the power domains framework must be assigned a unique ID. The rest of power >> - * wells must be assigned DISP_PW_ID_NONE. >> - */ >> -enum i915_power_well_id { >> - DISP_PW_ID_NONE, >> - >> - VLV_DISP_PW_DISP2D, >> - BXT_DISP_PW_DPIO_CMN_A, >> - VLV_DISP_PW_DPIO_CMN_BC, >> - GLK_DISP_PW_DPIO_CMN_C, >> - CHV_DISP_PW_DPIO_CMN_D, >> - HSW_DISP_PW_GLOBAL, >> - SKL_DISP_PW_MISC_IO, >> - SKL_DISP_PW_1, >> - SKL_DISP_PW_2, >> -}; > > drivers/gpu/drm/i915/display/intel_hdcp.c also uses this enum, so it > should also include the header > in which it's defined. > That's already done in this patch. Were you thinking of another header? Daniele > other than that > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > > Lucas De Marchi > >> - >> #define PUNIT_REG_PWRGT_CTRL 0x60 >> #define PUNIT_REG_PWRGT_STATUS 0x61 >> #define PUNIT_PWRGT_MASK(pw_idx) (3 << ((pw_idx) * 2)) >> -- >> 2.22.0 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > >
On 8/16/19 8:27 AM, Daniele Ceraolo Spurio wrote: > > > On 8/15/19 9:52 PM, Lucas De Marchi wrote: >> On Thu, Aug 15, 2019 at 6:24 PM Daniele Ceraolo Spurio >> <daniele.ceraolospurio@intel.com> wrote: >>> >>> It has nothing to do with registers, so move it to the more appropriate >>> intel_display_power.h >>> >>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >>> Cc: Imre Deak <imre.deak@intel.com> >>> --- >>> .../drm/i915/display/intel_display_power.c | 1 + >>> .../drm/i915/display/intel_display_power.h | 21 +++++++++++++++++++ >>> drivers/gpu/drm/i915/display/intel_hdcp.c | 1 + >>> drivers/gpu/drm/i915/i915_reg.h | 21 ------------------- >>> 4 files changed, 23 insertions(+), 21 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c >>> b/drivers/gpu/drm/i915/display/intel_display_power.c >>> index 374b75602141..1caae2f61216 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_display_power.c >>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c >>> @@ -13,6 +13,7 @@ >>> #include "intel_cdclk.h" >>> #include "intel_combo_phy.h" >>> #include "intel_csr.h" >>> +#include "intel_display_power.h" >>> #include "intel_display_types.h" >>> #include "intel_dpio_phy.h" >>> #include "intel_hotplug.h" >>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h >>> b/drivers/gpu/drm/i915/display/intel_display_power.h >>> index 97f2562fc5d3..a50605b8b1ad 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_display_power.h >>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h >>> @@ -92,6 +92,27 @@ enum intel_display_power_domain { >>> POWER_DOMAIN_NUM, >>> }; >>> >>> +/* >>> + * i915_power_well_id: >>> + * >>> + * IDs used to look up power wells. Power wells accessed directly >>> bypassing >>> + * the power domains framework must be assigned a unique ID. The >>> rest of power >>> + * wells must be assigned DISP_PW_ID_NONE. >>> + */ >>> +enum i915_power_well_id { >>> + DISP_PW_ID_NONE, >>> + >>> + VLV_DISP_PW_DISP2D, >>> + BXT_DISP_PW_DPIO_CMN_A, >>> + VLV_DISP_PW_DPIO_CMN_BC, >>> + GLK_DISP_PW_DPIO_CMN_C, >>> + CHV_DISP_PW_DPIO_CMN_D, >>> + HSW_DISP_PW_GLOBAL, >>> + SKL_DISP_PW_MISC_IO, >>> + SKL_DISP_PW_1, >>> + SKL_DISP_PW_2, >>> +}; >>> + >>> #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A) >>> #define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \ >>> ((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER) >>> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c >>> b/drivers/gpu/drm/i915/display/intel_hdcp.c >>> index dc4aaec2e04c..0beb954b5318 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c >>> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c >>> @@ -14,6 +14,7 @@ >>> #include <drm/i915_component.h> >>> >>> #include "i915_reg.h" >>> +#include "intel_display_power.h" >>> #include "intel_display_types.h" >>> #include "intel_hdcp.h" >>> #include "intel_sideband.h" >>> diff --git a/drivers/gpu/drm/i915/i915_reg.h >>> b/drivers/gpu/drm/i915/i915_reg.h >>> index 2b7ccebf6550..14165d619175 100644 >>> --- a/drivers/gpu/drm/i915/i915_reg.h >>> +++ b/drivers/gpu/drm/i915/i915_reg.h >>> @@ -1163,27 +1163,6 @@ static inline bool >>> i915_mmio_reg_valid(i915_reg_t reg) >>> #define PUNIT_REG_ISPSSPM0 0x39 >>> #define PUNIT_REG_ISPSSPM1 0x3a >>> >>> -/* >>> - * i915_power_well_id: >>> - * >>> - * IDs used to look up power wells. Power wells accessed directly >>> bypassing >>> - * the power domains framework must be assigned a unique ID. The >>> rest of power >>> - * wells must be assigned DISP_PW_ID_NONE. >>> - */ >>> -enum i915_power_well_id { >>> - DISP_PW_ID_NONE, >>> - >>> - VLV_DISP_PW_DISP2D, >>> - BXT_DISP_PW_DPIO_CMN_A, >>> - VLV_DISP_PW_DPIO_CMN_BC, >>> - GLK_DISP_PW_DPIO_CMN_C, >>> - CHV_DISP_PW_DPIO_CMN_D, >>> - HSW_DISP_PW_GLOBAL, >>> - SKL_DISP_PW_MISC_IO, >>> - SKL_DISP_PW_1, >>> - SKL_DISP_PW_2, >>> -}; >> >> drivers/gpu/drm/i915/display/intel_hdcp.c also uses this enum, so it >> should also include the header >> in which it's defined. >> > > That's already done in this patch. Were you thinking of another header? Sorry, I meant another .c file (I haven't had my coffee yet...) Daniele > > Daniele > >> other than that >> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> >> >> Lucas De Marchi >> >>> - >>> #define PUNIT_REG_PWRGT_CTRL 0x60 >>> #define PUNIT_REG_PWRGT_STATUS 0x61 >>> #define PUNIT_PWRGT_MASK(pw_idx) (3 << ((pw_idx) * 2)) >>> -- >>> 2.22.0 >>> >>> _______________________________________________ >>> Intel-gfx mailing list >>> Intel-gfx@lists.freedesktop.org >>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx >> >> >>
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 374b75602141..1caae2f61216 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -13,6 +13,7 @@ #include "intel_cdclk.h" #include "intel_combo_phy.h" #include "intel_csr.h" +#include "intel_display_power.h" #include "intel_display_types.h" #include "intel_dpio_phy.h" #include "intel_hotplug.h" diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h index 97f2562fc5d3..a50605b8b1ad 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.h +++ b/drivers/gpu/drm/i915/display/intel_display_power.h @@ -92,6 +92,27 @@ enum intel_display_power_domain { POWER_DOMAIN_NUM, }; +/* + * i915_power_well_id: + * + * IDs used to look up power wells. Power wells accessed directly bypassing + * the power domains framework must be assigned a unique ID. The rest of power + * wells must be assigned DISP_PW_ID_NONE. + */ +enum i915_power_well_id { + DISP_PW_ID_NONE, + + VLV_DISP_PW_DISP2D, + BXT_DISP_PW_DPIO_CMN_A, + VLV_DISP_PW_DPIO_CMN_BC, + GLK_DISP_PW_DPIO_CMN_C, + CHV_DISP_PW_DPIO_CMN_D, + HSW_DISP_PW_GLOBAL, + SKL_DISP_PW_MISC_IO, + SKL_DISP_PW_1, + SKL_DISP_PW_2, +}; + #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A) #define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \ ((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index dc4aaec2e04c..0beb954b5318 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -14,6 +14,7 @@ #include <drm/i915_component.h> #include "i915_reg.h" +#include "intel_display_power.h" #include "intel_display_types.h" #include "intel_hdcp.h" #include "intel_sideband.h" diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2b7ccebf6550..14165d619175 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1163,27 +1163,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define PUNIT_REG_ISPSSPM0 0x39 #define PUNIT_REG_ISPSSPM1 0x3a -/* - * i915_power_well_id: - * - * IDs used to look up power wells. Power wells accessed directly bypassing - * the power domains framework must be assigned a unique ID. The rest of power - * wells must be assigned DISP_PW_ID_NONE. - */ -enum i915_power_well_id { - DISP_PW_ID_NONE, - - VLV_DISP_PW_DISP2D, - BXT_DISP_PW_DPIO_CMN_A, - VLV_DISP_PW_DPIO_CMN_BC, - GLK_DISP_PW_DPIO_CMN_C, - CHV_DISP_PW_DPIO_CMN_D, - HSW_DISP_PW_GLOBAL, - SKL_DISP_PW_MISC_IO, - SKL_DISP_PW_1, - SKL_DISP_PW_2, -}; - #define PUNIT_REG_PWRGT_CTRL 0x60 #define PUNIT_REG_PWRGT_STATUS 0x61 #define PUNIT_PWRGT_MASK(pw_idx) (3 << ((pw_idx) * 2))
It has nothing to do with registers, so move it to the more appropriate intel_display_power.h Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Imre Deak <imre.deak@intel.com> --- .../drm/i915/display/intel_display_power.c | 1 + .../drm/i915/display/intel_display_power.h | 21 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_hdcp.c | 1 + drivers/gpu/drm/i915/i915_reg.h | 21 ------------------- 4 files changed, 23 insertions(+), 21 deletions(-)