| Message ID | 20190817093902.2171-23-lucas.demarchi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Tiger Lake batch 3 | expand |
On Sat, 2019-08-17 at 02:38 -0700, Lucas De Marchi wrote: > From: Michel Thierry <michel.thierry@intel.com> > > Workaround no longer needed (plus L3_LRA_1_GPGPU doesn't exist). Took a look at this one today and I can at least say this register is not present at the previous location. I didn't have any luck finding a specific reference saying this was dropped for TGL. I'll dig a bit deeper for a full review tomorrow if this is still waiting for feedback. Thanks, Stuart > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Signed-off-by: Michel Thierry <michel.thierry@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c > b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 5413c2ff51a2..6f6f0687d0bb 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -2012,7 +2012,7 @@ static void gtt_write_workarounds(struct > intel_gt *gt) > intel_uncore_write(uncore, > GEN8_L3_LRA_1_GPGPU, > GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BX > T); > - else if (INTEL_GEN(i915) >= 9) > + else if (INTEL_GEN(i915) >= 9 && INTEL_GEN(i915) <= 11) > intel_uncore_write(uncore, > GEN8_L3_LRA_1_GPGPU, > GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SK > L);
On Tue, 2019-08-20 at 23:29 +0000, Summers, Stuart wrote: > On Sat, 2019-08-17 at 02:38 -0700, Lucas De Marchi wrote: > > From: Michel Thierry <michel.thierry@intel.com> > > > > Workaround no longer needed (plus L3_LRA_1_GPGPU doesn't exist). > > Took a look at this one today and I can at least say this register is > not present at the previous location. I didn't have any luck finding > a > specific reference saying this was dropped for TGL. > > I'll dig a bit deeper for a full review tomorrow if this is still > waiting for feedback. I looked in to this some more today. I still can't find a reference explicitly indicating this WA is removed for TGL. That said, it does appear the register is no longer present, and without the register, I can't see how this WA would be applied - certainly it doesn't look as if there is a corresponding WA for TGL pointing to a different register. So with that in mind, here's my: Reviewed-by: Stuart Summers <stuart.summers@intel.com> > > Thanks, > Stuart > > > > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > > Signed-off-by: Michel Thierry <michel.thierry@intel.com> > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > > --- > > drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c > > b/drivers/gpu/drm/i915/i915_gem_gtt.c > > index 5413c2ff51a2..6f6f0687d0bb 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > > @@ -2012,7 +2012,7 @@ static void gtt_write_workarounds(struct > > intel_gt *gt) > > intel_uncore_write(uncore, > > GEN8_L3_LRA_1_GPGPU, > > GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BX > > T); > > - else if (INTEL_GEN(i915) >= 9) > > + else if (INTEL_GEN(i915) >= 9 && INTEL_GEN(i915) <= 11) > > intel_uncore_write(uncore, > > GEN8_L3_LRA_1_GPGPU, > > GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SK > > L); > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 5413c2ff51a2..6f6f0687d0bb 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2012,7 +2012,7 @@ static void gtt_write_workarounds(struct intel_gt *gt) intel_uncore_write(uncore, GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT); - else if (INTEL_GEN(i915) >= 9) + else if (INTEL_GEN(i915) >= 9 && INTEL_GEN(i915) <= 11) intel_uncore_write(uncore, GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);